diff options
| author | Joseph Myers <joseph@codesourcery.com> | 2020-05-07 00:44:57 +0000 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2020-06-10 12:10:17 -0400 |
| commit | b40eec96b26028b68c3594fbf34b6d6f029df26a (patch) | |
| tree | 9d102ee76ffb044cc3fe3612d37e634c85cc3c05 | |
| parent | 0d48b436327955c69e2eb53f88aba9aa1e0dbaa0 (diff) | |
target/i386: fix fscale handling of invalid exponent encodings
The fscale implementation does not check for invalid encodings in the
exponent operand, thus treating them like INT_MIN (the value returned
for invalid encodings by floatx80_to_int32_round_to_zero). Fix it to
treat them similarly to signaling NaN exponents, thus generating a
quiet NaN result.
Signed-off-by: Joseph Myers <joseph@codesourcery.com>
Message-Id: <alpine.DEB.2.21.2005070044190.18350@digraph.polyomino.org.uk>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | target/i386/fpu_helper.c | 5 | ||||
| -rw-r--r-- | tests/tcg/i386/test-i386-fscale.c | 29 |
2 files changed, 33 insertions, 1 deletions
diff --git a/target/i386/fpu_helper.c b/target/i386/fpu_helper.c index 0671de6952..10ff90370e 100644 --- a/target/i386/fpu_helper.c +++ b/target/i386/fpu_helper.c @@ -968,7 +968,10 @@ void helper_frndint(CPUX86State *env) void helper_fscale(CPUX86State *env) { - if (floatx80_is_any_nan(ST1)) { + if (floatx80_invalid_encoding(ST1)) { + float_raise(float_flag_invalid, &env->fp_status); + ST0 = floatx80_default_nan(&env->fp_status); + } else if (floatx80_is_any_nan(ST1)) { ST0 = ST1; if (floatx80_is_signaling_nan(ST0, &env->fp_status)) { float_raise(float_flag_invalid, &env->fp_status); diff --git a/tests/tcg/i386/test-i386-fscale.c b/tests/tcg/i386/test-i386-fscale.c index aecac5125f..b65a055d0a 100644 --- a/tests/tcg/i386/test-i386-fscale.c +++ b/tests/tcg/i386/test-i386-fscale.c @@ -8,6 +8,11 @@ union u { long double ld; }; +volatile union u ld_invalid_1 = { .s = { 1, 1234 } }; +volatile union u ld_invalid_2 = { .s = { 0, 1234 } }; +volatile union u ld_invalid_3 = { .s = { 0, 0x7fff } }; +volatile union u ld_invalid_4 = { .s = { (UINT64_C(1) << 63) - 1, 0x7fff } }; + volatile long double ld_res; int isnan_ld(long double x) @@ -33,5 +38,29 @@ int main(void) printf("FAIL: fscale snan\n"); ret = 1; } + __asm__ volatile ("fscale" : "=t" (ld_res) : + "0" (2.5L), "u" (ld_invalid_1.ld)); + if (!isnan_ld(ld_res) || issignaling_ld(ld_res)) { + printf("FAIL: fscale invalid 1\n"); + ret = 1; + } + __asm__ volatile ("fscale" : "=t" (ld_res) : + "0" (2.5L), "u" (ld_invalid_2.ld)); + if (!isnan_ld(ld_res) || issignaling_ld(ld_res)) { + printf("FAIL: fscale invalid 2\n"); + ret = 1; + } + __asm__ volatile ("fscale" : "=t" (ld_res) : + "0" (2.5L), "u" (ld_invalid_3.ld)); + if (!isnan_ld(ld_res) || issignaling_ld(ld_res)) { + printf("FAIL: fscale invalid 3\n"); + ret = 1; + } + __asm__ volatile ("fscale" : "=t" (ld_res) : + "0" (2.5L), "u" (ld_invalid_4.ld)); + if (!isnan_ld(ld_res) || issignaling_ld(ld_res)) { + printf("FAIL: fscale invalid 4\n"); + ret = 1; + } return ret; } |