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authorDavid Gibson <david@gibson.dropbear.id.au>2012-10-29 17:24:57 +0000
committerAlexander Graf <agraf@suse.de>2012-11-01 13:02:21 +0100
commita3cfa18eb075c7ef78358ca1956fe7b01caa1724 (patch)
tree622a8d4a7789c07d041d8eb9081a5f47a8c11fff
parent286d52ebfc0d0d53c2a878e454292fea14bad41b (diff)
Revert "PPC: pseries: Remove hack for PIO window"
This reverts commit a178274efabcbbc5d44805b51def874e47051325. Contrary to that commit's message, the users of old_portio are not all gone. In particular VGA still uses it via portio_list_add(). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
-rw-r--r--hw/spapr_pci.c44
-rw-r--r--hw/spapr_pci.h2
2 files changed, 44 insertions, 2 deletions
diff --git a/hw/spapr_pci.c b/hw/spapr_pci.c
index c2c3079d21..a08ed11166 100644
--- a/hw/spapr_pci.c
+++ b/hw/spapr_pci.c
@@ -439,6 +439,43 @@ static void pci_spapr_set_irq(void *opaque, int irq_num, int level)
qemu_set_irq(spapr_phb_lsi_qirq(phb, irq_num), level);
}
+static uint64_t spapr_io_read(void *opaque, hwaddr addr,
+ unsigned size)
+{
+ switch (size) {
+ case 1:
+ return cpu_inb(addr);
+ case 2:
+ return cpu_inw(addr);
+ case 4:
+ return cpu_inl(addr);
+ }
+ assert(0);
+}
+
+static void spapr_io_write(void *opaque, hwaddr addr,
+ uint64_t data, unsigned size)
+{
+ switch (size) {
+ case 1:
+ cpu_outb(addr, data);
+ return;
+ case 2:
+ cpu_outw(addr, data);
+ return;
+ case 4:
+ cpu_outl(addr, data);
+ return;
+ }
+ assert(0);
+}
+
+static const MemoryRegionOps spapr_io_ops = {
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .read = spapr_io_read,
+ .write = spapr_io_write
+};
+
/*
* MSI/MSIX memory region implementation.
* The handler handles both MSI and MSIX.
@@ -508,9 +545,14 @@ static int spapr_phb_init(SysBusDevice *s)
* old_portion are updated */
sprintf(namebuf, "%s.io", sphb->dtbusname);
memory_region_init(&sphb->iospace, namebuf, SPAPR_PCI_IO_WIN_SIZE);
+ /* FIXME: fix to support multiple PHBs */
+ memory_region_add_subregion(get_system_io(), 0, &sphb->iospace);
+ sprintf(namebuf, "%s.io-alias", sphb->dtbusname);
+ memory_region_init_io(&sphb->iowindow, &spapr_io_ops, sphb,
+ namebuf, SPAPR_PCI_IO_WIN_SIZE);
memory_region_add_subregion(get_system_memory(), sphb->io_win_addr,
- &sphb->iospace);
+ &sphb->iowindow);
/* As MSI/MSIX interrupts trigger by writing at MSI/MSIX vectors,
* we need to allocate some memory to catch those writes coming
diff --git a/hw/spapr_pci.h b/hw/spapr_pci.h
index a77d7d5448..e307ac8035 100644
--- a/hw/spapr_pci.h
+++ b/hw/spapr_pci.h
@@ -44,7 +44,7 @@ typedef struct sPAPRPHBState {
MemoryRegion memspace, iospace;
hwaddr mem_win_addr, mem_win_size, io_win_addr, io_win_size;
hwaddr msi_win_addr;
- MemoryRegion memwindow, msiwindow;
+ MemoryRegion memwindow, iowindow, msiwindow;
uint32_t dma_liobn;
uint64_t dma_window_start;