diff options
author | Matheus Ferst <matheus.ferst@eldorado.org.br> | 2022-10-06 17:06:50 -0300 |
---|---|---|
committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-10-28 13:15:21 -0300 |
commit | 9d950c724144770d9d092f70716da0da022926de (patch) | |
tree | f92209beeaac5e939f82da7b2596a16714d8761c | |
parent | 4f93f071ca9e7f85f976c805142d33f6cffd2745 (diff) |
target/ppc: fix msgsync insns flags
This instruction was added by Power ISA 3.0, using PPC2_PRCNTL makes it
available for older processors, like de e5500 and e6500.
Fixes: 7af1e7b02264 ("target/ppc: add support for hypervisor doorbells on book3s CPUs")
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
Message-Id: <20221006200654.725390-3-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
-rw-r--r-- | target/ppc/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/ppc/translate.c b/target/ppc/translate.c index b5d80fd13d..ccf2ffd567 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -6906,7 +6906,7 @@ GEN_HANDLER2_E(msgsnd, "msgsnd", 0x1F, 0x0E, 0x06, 0x03ff0001, GEN_HANDLER2_E(msgclr, "msgclr", 0x1F, 0x0E, 0x07, 0x03ff0001, PPC_NONE, (PPC2_PRCNTL | PPC2_ISA207S)), GEN_HANDLER2_E(msgsync, "msgsync", 0x1F, 0x16, 0x1B, 0x00000000, - PPC_NONE, PPC2_PRCNTL), + PPC_NONE, PPC2_ISA300), GEN_HANDLER(wrtee, 0x1F, 0x03, 0x04, 0x000FFC01, PPC_WRTEE), GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000E7C01, PPC_WRTEE), GEN_HANDLER(dlmzb, 0x1F, 0x0E, 0x02, 0x00000000, PPC_440_SPEC), |