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authorRichard Henderson <richard.henderson@linaro.org>2022-03-02 19:09:35 -0500
committerRichard Henderson <richard.henderson@linaro.org>2022-03-14 10:31:51 -0700
commit6e5f9fb7993aa3de5295ae2dbada39258ed333ac (patch)
tree657424118beb879f6d728bbe6615f59c590be749
parenta66669c942077d53414ae0894e9fba3ddc18f58d (diff)
tcg/s390x: Fix INDEX_op_bitsel_vec vs VSEL
The operands are output in the wrong order: the tcg selector argument is first, whereas the s390x selector argument is last. Tested-by: Thomas Huth <thuth@redhat.com> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/898 Fixes: 9bca986df88 ("tcg/s390x: Implement TCG_TARGET_HAS_bitsel_vec") Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r--tcg/s390x/tcg-target.c.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index 508f1bccc7..3b185b3c96 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -2868,7 +2868,7 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_bitsel_vec:
- tcg_out_insn(s, VRRe, VSEL, a0, a1, a2, args[3]);
+ tcg_out_insn(s, VRRe, VSEL, a0, a2, args[3], a1);
break;
case INDEX_op_cmp_vec: