diff options
| author | Jiajie Chen <c@jia.je> | 2023-06-14 14:55:56 +0800 |
|---|---|---|
| committer | Song Gao <gaosong@loongson.cn> | 2023-06-16 17:58:46 +0800 |
| commit | 505aa8d8f29b79fcef77563bb4124208badbd8d4 (patch) | |
| tree | 4b0c3dd3d6088b4510a367e94200b0a167048a25 | |
| parent | f33238836544cb6f3b27968d1ececbd46f037904 (diff) | |
target/loongarch: Fix CSR.DMW0-3.VSEG check
The previous code checks whether the highest 16 bits of virtual address
equal to that of CSR.DMW0-3. This is incorrect according to the spec,
and is corrected to compare only the highest four bits instead.
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230614065556.2397513-1-c@jia.je>
Signed-off-by: Song Gao <gaosong@loongson.cn>
| -rw-r--r-- | target/loongarch/tlb_helper.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/loongarch/tlb_helper.c b/target/loongarch/tlb_helper.c index cce1db1e0a..6e00190547 100644 --- a/target/loongarch/tlb_helper.c +++ b/target/loongarch/tlb_helper.c @@ -185,10 +185,10 @@ static int get_physical_address(CPULoongArchState *env, hwaddr *physical, } plv = kernel_mode | (user_mode << R_CSR_DMW_PLV3_SHIFT); - base_v = address >> TARGET_VIRT_ADDR_SPACE_BITS; + base_v = address >> R_CSR_DMW_VSEG_SHIFT; /* Check direct map window */ for (int i = 0; i < 4; i++) { - base_c = env->CSR_DMW[i] >> TARGET_VIRT_ADDR_SPACE_BITS; + base_c = FIELD_EX64(env->CSR_DMW[i], CSR_DMW, VSEG); if ((plv & env->CSR_DMW[i]) && (base_c == base_v)) { *physical = dmw_va2pa(address); *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; |