diff options
| author | TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com> | 2024-10-07 10:57:00 +0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-10-22 11:57:25 -0700 |
| commit | 4b7868f8c21cebda86e81f3653e055aa2e87b591 (patch) | |
| tree | a4b329cee00838f140c0bc2f2bb2a3429706e906 | |
| parent | d1843219a1365f92ac1652074ba8c352eeeff82f (diff) | |
tcg/riscv: Enable native vector support for TCG host
Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20241007025700.47259-13-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | tcg/riscv/tcg-target.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h index e6d66cd1b9..334c37cbe6 100644 --- a/tcg/riscv/tcg-target.h +++ b/tcg/riscv/tcg-target.h @@ -143,9 +143,9 @@ typedef enum { #define TCG_TARGET_HAS_tst 0 /* vector instructions */ -#define TCG_TARGET_HAS_v64 0 -#define TCG_TARGET_HAS_v128 0 -#define TCG_TARGET_HAS_v256 0 +#define TCG_TARGET_HAS_v64 (cpuinfo & CPUINFO_ZVE64X) +#define TCG_TARGET_HAS_v128 (cpuinfo & CPUINFO_ZVE64X) +#define TCG_TARGET_HAS_v256 (cpuinfo & CPUINFO_ZVE64X) #define TCG_TARGET_HAS_andc_vec 0 #define TCG_TARGET_HAS_orc_vec 0 #define TCG_TARGET_HAS_nand_vec 0 |