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authorPeter Maydell <peter.maydell@linaro.org>2020-11-10 14:59:20 +0000
committerPeter Maydell <peter.maydell@linaro.org>2020-11-10 14:59:20 +0000
commit3e7d06d05a3689972171ad6a289315d54ea2e915 (patch)
tree844ca7d9ffbec29d846c016cb97d23087c80bde8
parent879860ca706fa1ef47ba511c49a6e2b1b49be9b7 (diff)
parentb6c56c8a9a4064ea783f352f43c5df6231a110fa (diff)
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201110' into staging
target-arm queue: * hw/arm/Kconfig: ARM_V7M depends on PTIMER * Minor coding style fixes * docs: add some notes on the sbsa-ref machine * hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals * target/arm: Fix neon VTBL/VTBX for len > 1 * hw/arm/armsse: Correct expansion MPC interrupt lines * hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ * hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup() * hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input * hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary * hw/arm/nseries: Check return value from load_image_targphys() * tests/qtest/npcm7xx_rng-test: count runs properly * target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check # gpg: Signature made Tue 10 Nov 2020 11:17:45 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20201110: target/arm/translate-neon.c: Handle VTBL UNDEF case before VFP access check tests/qtest/npcm7xx_rng-test: count runs properly hw/arm/nseries: Check return value from load_image_targphys() hw/arm/musicpal: Only use qdev_get_gpio_in() when necessary hw/arm/musicpal: Don't connect two qemu_irqs directly to the same input hw/arm/nseries: Remove invalid/unnecessary n8x0_uart_setup() hw/misc/stm32f2xx_syscfg: Remove extraneous IRQ hw/arm/armsse: Correct expansion MPC interrupt lines target/arm: Fix neon VTBL/VTBX for len > 1 hw/arm/virt: Remove dependency on Cortex-A15 MPCore peripherals docs: add some notes on the sbsa-ref machine target/arm: add space before the open parenthesis '(' target/arm: Don't use '#' flag of printf format target/arm: add spaces around operator ssi: Fix bad printf format specifiers hw/arm/Kconfig: ARM_V7M depends on PTIMER Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--docs/system/arm/sbsa.rst32
-rw-r--r--docs/system/target-arm.rst1
-rw-r--r--hw/arm/Kconfig3
-rw-r--r--hw/arm/armsse.c3
-rw-r--r--hw/arm/musicpal.c42
-rw-r--r--hw/arm/nseries.c26
-rw-r--r--hw/arm/stm32f205_soc.c1
-rw-r--r--hw/misc/stm32f2xx_syscfg.c2
-rw-r--r--hw/ssi/imx_spi.c2
-rw-r--r--hw/ssi/xilinx_spi.c2
-rw-r--r--include/hw/misc/stm32f2xx_syscfg.h2
-rw-r--r--target/arm/arch_dump.c8
-rw-r--r--target/arm/arm-semi.c8
-rw-r--r--target/arm/helper.c2
-rw-r--r--target/arm/helper.h2
-rw-r--r--target/arm/op_helper.c23
-rw-r--r--target/arm/translate-a64.c4
-rw-r--r--target/arm/translate-neon.c.inc50
-rw-r--r--target/arm/translate.c2
-rw-r--r--tests/qtest/npcm7xx_rng-test.c2
20 files changed, 121 insertions, 96 deletions
diff --git a/docs/system/arm/sbsa.rst b/docs/system/arm/sbsa.rst
new file mode 100644
index 0000000000..b8ecfdb62f
--- /dev/null
+++ b/docs/system/arm/sbsa.rst
@@ -0,0 +1,32 @@
+Arm Server Base System Architecture Reference board (``sbsa-ref``)
+==================================================================
+
+While the `virt` board is a generic board platform that doesn't match
+any real hardware the `sbsa-ref` board intends to look like real
+hardware. The `Server Base System Architecture
+<https://developer.arm.com/documentation/den0029/latest>` defines a
+minimum base line of hardware support and importantly how the firmware
+reports that to any operating system. It is a static system that
+reports a very minimal DT to the firmware for non-discoverable
+information about components affected by the qemu command line (i.e.
+cpus and memory). As a result it must have a firmware specifically
+built to expect a certain hardware layout (as you would in a real
+machine).
+
+It is intended to be a machine for developing firmware and testing
+standards compliance with operating systems.
+
+Supported devices
+"""""""""""""""""
+
+The sbsa-ref board supports:
+
+ - A configurable number of AArch64 CPUs
+ - GIC version 3
+ - System bus AHCI controller
+ - System bus EHCI controller
+ - CDROM and hard disc on AHCI bus
+ - E1000E ethernet card on PCIe bus
+ - VGA display adaptor on PCIe bus
+ - A generic SBSA watchdog device
+
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
index fdcf25c237..a0d5c57799 100644
--- a/docs/system/target-arm.rst
+++ b/docs/system/target-arm.rst
@@ -79,6 +79,7 @@ undocumented; you can get a complete list by running
arm/mps2
arm/musca
arm/realview
+ arm/sbsa
arm/versatile
arm/vexpress
arm/aspeed
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index fdf4464b94..7d022eeefd 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -6,7 +6,6 @@ config ARM_VIRT
imply VFIO_PLATFORM
imply VFIO_XGMAC
imply TPM_TIS_SYSBUS
- select A15MPCORE
select ACPI
select ARM_SMMUV3
select GPIO_KEY
@@ -94,6 +93,7 @@ config MUSCA
config MUSICPAL
bool
+ select OR_IRQ
select BITBANG_I2C
select MARVELL_88W8618
select PTIMER
@@ -291,6 +291,7 @@ config ZYNQ
config ARM_V7M
bool
+ select PTIMER
config ALLWINNER_A10
bool
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index a93da37dcb..baac027659 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -1074,7 +1074,8 @@ static void armsse_realize(DeviceState *dev, Error **errp)
qdev_get_gpio_in(dev_splitter, 0));
qdev_connect_gpio_out(dev_splitter, 0,
qdev_get_gpio_in_named(dev_secctl,
- "mpc_status", 0));
+ "mpc_status",
+ i - IOTS_NUM_EXP_MPC));
}
qdev_connect_gpio_out(dev_splitter, 1,
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index 5eb3f969fb..458b1cbeb7 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -27,6 +27,7 @@
#include "ui/console.h"
#include "hw/i2c/i2c.h"
#include "hw/irq.h"
+#include "hw/or-irq.h"
#include "hw/audio/wm8750.h"
#include "sysemu/block-backend.h"
#include "sysemu/runstate.h"
@@ -77,8 +78,7 @@
#define MP_TIMER4_IRQ 7
#define MP_EHCI_IRQ 8
#define MP_ETH_IRQ 9
-#define MP_UART1_IRQ 11
-#define MP_UART2_IRQ 11
+#define MP_UART_SHARED_IRQ 11
#define MP_GPIO_IRQ 12
#define MP_RTC_IRQ 28
#define MP_AUDIO_IRQ 30
@@ -1587,8 +1587,9 @@ static struct arm_boot_info musicpal_binfo = {
static void musicpal_init(MachineState *machine)
{
ARMCPU *cpu;
- qemu_irq pic[32];
DeviceState *dev;
+ DeviceState *pic;
+ DeviceState *uart_orgate;
DeviceState *i2c_dev;
DeviceState *lcd_dev;
DeviceState *key_dev;
@@ -1618,18 +1619,26 @@ static void musicpal_init(MachineState *machine)
&error_fatal);
memory_region_add_subregion(address_space_mem, MP_SRAM_BASE, sram);
- dev = sysbus_create_simple(TYPE_MV88W8618_PIC, MP_PIC_BASE,
+ pic = sysbus_create_simple(TYPE_MV88W8618_PIC, MP_PIC_BASE,
qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ));
- for (i = 0; i < 32; i++) {
- pic[i] = qdev_get_gpio_in(dev, i);
- }
- sysbus_create_varargs(TYPE_MV88W8618_PIT, MP_PIT_BASE, pic[MP_TIMER1_IRQ],
- pic[MP_TIMER2_IRQ], pic[MP_TIMER3_IRQ],
- pic[MP_TIMER4_IRQ], NULL);
-
- serial_mm_init(address_space_mem, MP_UART1_BASE, 2, pic[MP_UART1_IRQ],
+ sysbus_create_varargs(TYPE_MV88W8618_PIT, MP_PIT_BASE,
+ qdev_get_gpio_in(pic, MP_TIMER1_IRQ),
+ qdev_get_gpio_in(pic, MP_TIMER2_IRQ),
+ qdev_get_gpio_in(pic, MP_TIMER3_IRQ),
+ qdev_get_gpio_in(pic, MP_TIMER4_IRQ), NULL);
+
+ /* Logically OR both UART IRQs together */
+ uart_orgate = DEVICE(object_new(TYPE_OR_IRQ));
+ object_property_set_int(OBJECT(uart_orgate), "num-lines", 2, &error_fatal);
+ qdev_realize_and_unref(uart_orgate, NULL, &error_fatal);
+ qdev_connect_gpio_out(DEVICE(uart_orgate), 0,
+ qdev_get_gpio_in(pic, MP_UART_SHARED_IRQ));
+
+ serial_mm_init(address_space_mem, MP_UART1_BASE, 2,
+ qdev_get_gpio_in(uart_orgate, 0),
1825000, serial_hd(0), DEVICE_NATIVE_ENDIAN);
- serial_mm_init(address_space_mem, MP_UART2_BASE, 2, pic[MP_UART2_IRQ],
+ serial_mm_init(address_space_mem, MP_UART2_BASE, 2,
+ qdev_get_gpio_in(uart_orgate, 1),
1825000, serial_hd(1), DEVICE_NATIVE_ENDIAN);
/* Register flash */
@@ -1665,14 +1674,15 @@ static void musicpal_init(MachineState *machine)
OBJECT(get_system_memory()), &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MP_ETH_BASE);
- sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[MP_ETH_IRQ]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
+ qdev_get_gpio_in(pic, MP_ETH_IRQ));
sysbus_create_simple("mv88w8618_wlan", MP_WLAN_BASE, NULL);
sysbus_create_simple(TYPE_MUSICPAL_MISC, MP_MISC_BASE, NULL);
dev = sysbus_create_simple(TYPE_MUSICPAL_GPIO, MP_GPIO_BASE,
- pic[MP_GPIO_IRQ]);
+ qdev_get_gpio_in(pic, MP_GPIO_IRQ));
i2c_dev = sysbus_create_simple("gpio_i2c", -1, NULL);
i2c = (I2CBus *)qdev_get_child_bus(i2c_dev, "i2c");
@@ -1704,7 +1714,7 @@ static void musicpal_init(MachineState *machine)
NULL);
sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, MP_AUDIO_BASE);
- sysbus_connect_irq(s, 0, pic[MP_AUDIO_IRQ]);
+ sysbus_connect_irq(s, 0, qdev_get_gpio_in(pic, MP_AUDIO_IRQ));
musicpal_binfo.ram_size = MP_RAM_DEFAULT_SIZE;
arm_load_kernel(cpu, machine, &musicpal_binfo);
diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c
index 76fd7fe985..387eea4d44 100644
--- a/hw/arm/nseries.c
+++ b/hw/arm/nseries.c
@@ -789,16 +789,6 @@ static void n8x0_cbus_setup(struct n800_s *s)
cbus_attach(cbus, s->tahvo = tahvo_init(tahvo_irq, 1));
}
-static void n8x0_uart_setup(struct n800_s *s)
-{
- Chardev *radio = qemu_chr_new("bt-dummy-uart", "null", NULL);
- /*
- * Note: We used to connect N8X0_BT_RESET_GPIO and N8X0_BT_WKUP_GPIO
- * here, but this code has been removed with the bluetooth backend.
- */
- omap_uart_attach(s->mpu->uart[BT_UART], radio);
-}
-
static void n8x0_usb_setup(struct n800_s *s)
{
SysBusDevice *dev;
@@ -1362,7 +1352,6 @@ static void n8x0_init(MachineState *machine,
n8x0_spi_setup(s);
n8x0_dss_setup(s);
n8x0_cbus_setup(s);
- n8x0_uart_setup(s);
if (machine_usb(machine)) {
n8x0_usb_setup(s);
}
@@ -1380,7 +1369,8 @@ static void n8x0_init(MachineState *machine,
/* No, wait, better start at the ROM. */
s->mpu->cpu->env.regs[15] = OMAP2_Q2_BASE + 0x400000;
- /* This is intended for loading the `secondary.bin' program from
+ /*
+ * This is intended for loading the `secondary.bin' program from
* Nokia images (the NOLO bootloader). The entry point seems
* to be at OMAP2_Q2_BASE + 0x400000.
*
@@ -1388,9 +1378,15 @@ static void n8x0_init(MachineState *machine,
* for them the entry point needs to be set to OMAP2_SRAM_BASE.
*
* The code above is for loading the `zImage' file from Nokia
- * images. */
- load_image_targphys(option_rom[0].name, OMAP2_Q2_BASE + 0x400000,
- machine->ram_size - 0x400000);
+ * images.
+ */
+ if (load_image_targphys(option_rom[0].name,
+ OMAP2_Q2_BASE + 0x400000,
+ machine->ram_size - 0x400000) < 0) {
+ error_report("Failed to load secondary bootloader %s",
+ option_rom[0].name);
+ exit(EXIT_FAILURE);
+ }
n800_setup_nolo_tags(nolo_tags);
cpu_physical_memory_write(OMAP2_SRAM_BASE, nolo_tags, 0x10000);
diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
index a4f3344db2..9cd41bf56d 100644
--- a/hw/arm/stm32f205_soc.c
+++ b/hw/arm/stm32f205_soc.c
@@ -117,7 +117,6 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
}
busdev = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(busdev, 0, 0x40013800);
- sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, 71));
/* Attach UART (uses USART registers) and USART controllers */
for (i = 0; i < STM_NUM_USARTS; i++) {
diff --git a/hw/misc/stm32f2xx_syscfg.c b/hw/misc/stm32f2xx_syscfg.c
index aa59b43549..04c22c2850 100644
--- a/hw/misc/stm32f2xx_syscfg.c
+++ b/hw/misc/stm32f2xx_syscfg.c
@@ -133,8 +133,6 @@ static void stm32f2xx_syscfg_init(Object *obj)
{
STM32F2XXSyscfgState *s = STM32F2XX_SYSCFG(obj);
- sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
-
memory_region_init_io(&s->mmio, obj, &stm32f2xx_syscfg_ops, s,
TYPE_STM32F2XX_SYSCFG, 0x400);
sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);
diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index 7f703d8328..d8885ae454 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -53,7 +53,7 @@ static const char *imx_spi_reg_name(uint32_t reg)
case ECSPI_MSGDATA:
return "ECSPI_MSGDATA";
default:
- sprintf(unknown, "%d ?", reg);
+ sprintf(unknown, "%u ?", reg);
return unknown;
}
}
diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c
index fec8817d94..49ff275593 100644
--- a/hw/ssi/xilinx_spi.c
+++ b/hw/ssi/xilinx_spi.c
@@ -142,7 +142,7 @@ static void xlx_spi_update_irq(XilinxSPI *s)
irq chain unless things really changed. */
if (pending != s->irqline) {
s->irqline = pending;
- DB_PRINT("irq_change of state %d ISR:%x IER:%X\n",
+ DB_PRINT("irq_change of state %u ISR:%x IER:%X\n",
pending, s->regs[R_IPISR], s->regs[R_IPIER]);
qemu_set_irq(s->irq, pending);
}
diff --git a/include/hw/misc/stm32f2xx_syscfg.h b/include/hw/misc/stm32f2xx_syscfg.h
index 57a98c533d..8595a3b31b 100644
--- a/include/hw/misc/stm32f2xx_syscfg.h
+++ b/include/hw/misc/stm32f2xx_syscfg.h
@@ -53,8 +53,6 @@ struct STM32F2XXSyscfgState {
uint32_t syscfg_exticr3;
uint32_t syscfg_exticr4;
uint32_t syscfg_cmpcr;
-
- qemu_irq irq;
};
#endif /* HW_STM32F2XX_SYSCFG_H */
diff --git a/target/arm/arch_dump.c b/target/arm/arch_dump.c
index 7693e17e96..0184845310 100644
--- a/target/arm/arch_dump.c
+++ b/target/arm/arch_dump.c
@@ -114,8 +114,8 @@ static int aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f,
for (i = 0; i < 32; ++i) {
uint64_t *q = aa64_vfp_qreg(env, i);
- note.vfp.vregs[2*i + 0] = cpu_to_dump64(s, q[0]);
- note.vfp.vregs[2*i + 1] = cpu_to_dump64(s, q[1]);
+ note.vfp.vregs[2 * i + 0] = cpu_to_dump64(s, q[0]);
+ note.vfp.vregs[2 * i + 1] = cpu_to_dump64(s, q[1]);
}
if (s->dump_info.d_endian == ELFDATA2MSB) {
@@ -125,8 +125,8 @@ static int aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f,
*/
for (i = 0; i < 32; ++i) {
uint64_t tmp = note.vfp.vregs[2*i];
- note.vfp.vregs[2*i] = note.vfp.vregs[2*i+1];
- note.vfp.vregs[2*i+1] = tmp;
+ note.vfp.vregs[2 * i] = note.vfp.vregs[2 * i + 1];
+ note.vfp.vregs[2 * i + 1] = tmp;
}
}
diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c
index 8718fd0194..c1df664f7e 100644
--- a/target/arm/arm-semi.c
+++ b/target/arm/arm-semi.c
@@ -755,7 +755,7 @@ target_ulong do_arm_semihosting(CPUARMState *env)
if (use_gdb_syscalls()) {
arm_semi_open_guestfd = guestfd;
ret = arm_gdb_syscall(cpu, arm_semi_open_cb, "open,%s,%x,1a4", arg0,
- (int)arg2+1, gdb_open_modeflags[arg1]);
+ (int)arg2 + 1, gdb_open_modeflags[arg1]);
} else {
ret = set_swi_errno(env, open(s, open_modeflags[arg1], 0644));
if (ret == (uint32_t)-1) {
@@ -852,7 +852,7 @@ target_ulong do_arm_semihosting(CPUARMState *env)
GET_ARG(1);
if (use_gdb_syscalls()) {
ret = arm_gdb_syscall(cpu, arm_semi_cb, "unlink,%s",
- arg0, (int)arg1+1);
+ arg0, (int)arg1 + 1);
} else {
s = lock_user_string(arg0);
if (!s) {
@@ -870,7 +870,7 @@ target_ulong do_arm_semihosting(CPUARMState *env)
GET_ARG(3);
if (use_gdb_syscalls()) {
return arm_gdb_syscall(cpu, arm_semi_cb, "rename,%s,%s",
- arg0, (int)arg1+1, arg2, (int)arg3+1);
+ arg0, (int)arg1 + 1, arg2, (int)arg3 + 1);
} else {
char *s2;
s = lock_user_string(arg0);
@@ -896,7 +896,7 @@ target_ulong do_arm_semihosting(CPUARMState *env)
GET_ARG(1);
if (use_gdb_syscalls()) {
return arm_gdb_syscall(cpu, arm_semi_cb, "system,%s",
- arg0, (int)arg1+1);
+ arg0, (int)arg1 + 1);
} else {
s = lock_user_string(arg0);
if (!s) {
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 6854591986..11b0803df7 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -12508,7 +12508,7 @@ uint32_t HELPER(usad8)(uint32_t a, uint32_t b)
uint32_t sum;
sum = do_usad(a, b);
sum += do_usad(a >> 8, b >> 8);
- sum += do_usad(a >> 16, b >>16);
+ sum += do_usad(a >> 16, b >> 16);
sum += do_usad(a >> 24, b >> 24);
return sum;
}
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 774d2cddb5..ff8148ddc6 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -245,7 +245,7 @@ DEF_HELPER_FLAGS_2(rsqrte_f32, TCG_CALL_NO_RWG, f32, f32, ptr)
DEF_HELPER_FLAGS_2(rsqrte_f64, TCG_CALL_NO_RWG, f64, f64, ptr)
DEF_HELPER_FLAGS_1(recpe_u32, TCG_CALL_NO_RWG, i32, i32)
DEF_HELPER_FLAGS_1(rsqrte_u32, TCG_CALL_NO_RWG, i32, i32)
-DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i32, i32, i32, ptr, i32)
+DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i64, env, i32, i64, i64)
DEF_HELPER_3(shl_cc, i32, env, i32, i32)
DEF_HELPER_3(shr_cc, i32, env, i32, i32)
diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
index b1065216b2..aa13b978c0 100644
--- a/target/arm/op_helper.c
+++ b/target/arm/op_helper.c
@@ -68,21 +68,24 @@ void raise_exception_ra(CPUARMState *env, uint32_t excp, uint32_t syndrome,
cpu_loop_exit_restore(cs, ra);
}
-uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def, void *vn,
- uint32_t maxindex)
+uint64_t HELPER(neon_tbl)(CPUARMState *env, uint32_t desc,
+ uint64_t ireg, uint64_t def)
{
- uint32_t val, shift;
- uint64_t *table = vn;
+ uint64_t tmp, val = 0;
+ uint32_t maxindex = ((desc & 3) + 1) * 8;
+ uint32_t base_reg = desc >> 2;
+ uint32_t shift, index, reg;
- val = 0;
- for (shift = 0; shift < 32; shift += 8) {
- uint32_t index = (ireg >> shift) & 0xff;
+ for (shift = 0; shift < 64; shift += 8) {
+ index = (ireg >> shift) & 0xff;
if (index < maxindex) {
- uint32_t tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff;
- val |= tmp << shift;
+ reg = base_reg + (index >> 3);
+ tmp = *aa32_vfp_dreg(env, reg);
+ tmp = ((tmp >> ((index & 7) << 3)) & 0xff) << shift;
} else {
- val |= def & (0xff << shift);
+ tmp = def & (0xffull << shift);
}
+ val |= tmp;
}
return val;
}
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 072754fa24..1867ec293f 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -12114,7 +12114,7 @@ static void disas_simd_three_reg_same_fp16(DisasContext *s, uint32_t insn)
gen_helper_advsimd_acgt_f16(tcg_res, tcg_op1, tcg_op2, fpst);
break;
default:
- fprintf(stderr, "%s: insn %#04x, fpop %#2x @ %#" PRIx64 "\n",
+ fprintf(stderr, "%s: insn 0x%04x, fpop 0x%2x @ 0x%" PRIx64 "\n",
__func__, insn, fpopcode, s->pc_curr);
g_assert_not_reached();
}
@@ -13121,7 +13121,7 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x7f: /* FSQRT (vector) */
break;
default:
- fprintf(stderr, "%s: insn %#04x fpop %#2x\n", __func__, insn, fpop);
+ fprintf(stderr, "%s: insn 0x%04x fpop 0x%2x\n", __func__, insn, fpop);
g_assert_not_reached();
}
diff --git a/target/arm/translate-neon.c.inc b/target/arm/translate-neon.c.inc
index 59368cb243..2403825d15 100644
--- a/target/arm/translate-neon.c.inc
+++ b/target/arm/translate-neon.c.inc
@@ -2861,9 +2861,8 @@ static bool trans_VEXT(DisasContext *s, arg_VEXT *a)
static bool trans_VTBL(DisasContext *s, arg_VTBL *a)
{
- int n;
- TCGv_i32 tmp, tmp2, tmp3, tmp4;
- TCGv_ptr ptr1;
+ TCGv_i64 val, def;
+ TCGv_i32 desc;
if (!arm_dc_feature(s, ARM_FEATURE_NEON)) {
return false;
@@ -2875,47 +2874,34 @@ static bool trans_VTBL(DisasContext *s, arg_VTBL *a)
return false;
}
- if (!vfp_access_check(s)) {
- return true;
- }
-
- n = a->len + 1;
- if ((a->vn + n) > 32) {
+ if ((a->vn + a->len + 1) > 32) {
/*
* This is UNPREDICTABLE; we choose to UNDEF to avoid the
* helper function running off the end of the register file.
*/
return false;
}
- n <<= 3;
- tmp = tcg_temp_new_i32();
- if (a->op) {
- read_neon_element32(tmp, a->vd, 0, MO_32);
- } else {
- tcg_gen_movi_i32(tmp, 0);
+
+ if (!vfp_access_check(s)) {
+ return true;
}
- tmp2 = tcg_temp_new_i32();
- read_neon_element32(tmp2, a->vm, 0, MO_32);
- ptr1 = vfp_reg_ptr(true, a->vn);
- tmp4 = tcg_const_i32(n);
- gen_helper_neon_tbl(tmp2, tmp2, tmp, ptr1, tmp4);
+ desc = tcg_const_i32((a->vn << 2) | a->len);
+ def = tcg_temp_new_i64();
if (a->op) {
- read_neon_element32(tmp, a->vd, 1, MO_32);
+ read_neon_element64(def, a->vd, 0, MO_64);
} else {
- tcg_gen_movi_i32(tmp, 0);
+ tcg_gen_movi_i64(def, 0);
}
- tmp3 = tcg_temp_new_i32();
- read_neon_element32(tmp3, a->vm, 1, MO_32);
- gen_helper_neon_tbl(tmp3, tmp3, tmp, ptr1, tmp4);
- tcg_temp_free_i32(tmp);
- tcg_temp_free_i32(tmp4);
- tcg_temp_free_ptr(ptr1);
+ val = tcg_temp_new_i64();
+ read_neon_element64(val, a->vm, 0, MO_64);
- write_neon_element32(tmp2, a->vd, 0, MO_32);
- write_neon_element32(tmp3, a->vd, 1, MO_32);
- tcg_temp_free_i32(tmp2);
- tcg_temp_free_i32(tmp3);
+ gen_helper_neon_tbl(val, cpu_env, desc, val, def);
+ write_neon_element64(val, a->vd, 0, MO_64);
+
+ tcg_temp_free_i64(def);
+ tcg_temp_free_i64(val);
+ tcg_temp_free_i32(desc);
return true;
}
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 29ea1eb781..f7d4ee393b 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -9171,7 +9171,7 @@ static void arm_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
- Hardware watchpoints.
Hardware breakpoints have already been handled and skip this code.
*/
- switch(dc->base.is_jmp) {
+ switch (dc->base.is_jmp) {
case DISAS_NEXT:
case DISAS_TOO_MANY:
gen_goto_tb(dc, 1, dc->base.pc_next);
diff --git a/tests/qtest/npcm7xx_rng-test.c b/tests/qtest/npcm7xx_rng-test.c
index e7cde85fbb..c614968ffc 100644
--- a/tests/qtest/npcm7xx_rng-test.c
+++ b/tests/qtest/npcm7xx_rng-test.c
@@ -126,7 +126,7 @@ static double calc_runs_p(const unsigned long *buf, unsigned int nr_bits)
pi = (double)nr_ones / nr_bits;
for (k = 0; k < nr_bits - 1; k++) {
- vn_obs += !(test_bit(k, buf) ^ test_bit(k + 1, buf));
+ vn_obs += (test_bit(k, buf) ^ test_bit(k + 1, buf));
}
vn_obs += 1;