diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2023-11-03 10:38:23 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-02-03 16:46:10 +1000 |
| commit | 33ec424535e2e8e5fa1fd78f691eb9c3c68fd449 (patch) | |
| tree | cb7c11bebf40533a8c0674e025dfa4babd8f18c7 | |
| parent | 388a6465957edea5759e727d5d54898fb4feba91 (diff) | |
target/sparc: Introduce gen_{load,store}_fpr_Q
Use them for trans_FMOVq.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20231103173841.33651-5-richard.henderson@linaro.org>
| -rw-r--r-- | target/sparc/translate.c | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 6824b5d835..c68f6ca94e 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -264,6 +264,22 @@ static TCGv_i64 gen_dest_fpr_D(DisasContext *dc, unsigned int dst) return cpu_fpr[DFPREG(dst) / 2]; } +static TCGv_i128 gen_load_fpr_Q(DisasContext *dc, unsigned int src) +{ + TCGv_i128 ret = tcg_temp_new_i128(); + + src = QFPREG(src); + tcg_gen_concat_i64_i128(ret, cpu_fpr[src / 2 + 1], cpu_fpr[src / 2]); + return ret; +} + +static void gen_store_fpr_Q(DisasContext *dc, unsigned int dst, TCGv_i128 v) +{ + dst = DFPREG(dst); + tcg_gen_extr_i128_i64(cpu_fpr[dst / 2 + 1], cpu_fpr[dst / 2], v); + gen_update_fprs_dirty(dc, dst); +} + static void gen_op_load_fpr_QT0(unsigned int src) { tcg_gen_st_i64(cpu_fpr[src / 2], tcg_env, offsetof(CPUSPARCState, qt0) + @@ -4615,7 +4631,7 @@ TRANS(FsTOx, 64, do_env_df, a, gen_helper_fstox) static bool trans_FMOVq(DisasContext *dc, arg_FMOVq *a) { - int rd, rs; + TCGv_i128 t; if (!avail_64(dc)) { return false; @@ -4628,11 +4644,8 @@ static bool trans_FMOVq(DisasContext *dc, arg_FMOVq *a) } gen_op_clear_ieee_excp_and_FTT(); - rd = QFPREG(a->rd); - rs = QFPREG(a->rs); - tcg_gen_mov_i64(cpu_fpr[rd / 2], cpu_fpr[rs / 2]); - tcg_gen_mov_i64(cpu_fpr[rd / 2 + 1], cpu_fpr[rs / 2 + 1]); - gen_update_fprs_dirty(dc, rd); + t = gen_load_fpr_Q(dc, a->rs); + gen_store_fpr_Q(dc, a->rd, t); return advance_pc(dc); } |