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authorCédric Le Goater <clg@kaod.org>2023-06-07 06:39:35 +0200
committerCédric Le Goater <clg@kaod.org>2023-09-01 11:40:04 +0200
commit243975c0553a61646e7c24beaa12f4451536ea6b (patch)
tree3416b7cc5c532da49f2a0af33b6d4ef58a327de9
parent9bf9865c5eb4a893b800eade8873b1795b64d555 (diff)
hw/ssi: Add a "cs" property to SSIPeripheral
Boards will use this new property to identify the device CS line and wire the SPI controllers accordingly. Cc: Alistair Francis <alistair@alistair23.me> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org>
-rw-r--r--hw/ssi/ssi.c7
-rw-r--r--include/hw/ssi/ssi.h3
2 files changed, 10 insertions, 0 deletions
diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c
index d54a109bee..4e33e0ea5b 100644
--- a/hw/ssi/ssi.c
+++ b/hw/ssi/ssi.c
@@ -13,6 +13,7 @@
*/
#include "qemu/osdep.h"
+#include "hw/qdev-properties.h"
#include "hw/ssi/ssi.h"
#include "migration/vmstate.h"
#include "qemu/module.h"
@@ -71,6 +72,11 @@ static void ssi_peripheral_realize(DeviceState *dev, Error **errp)
ssc->realize(s, errp);
}
+static Property ssi_peripheral_properties[] = {
+ DEFINE_PROP_UINT8("cs", SSIPeripheral, cs_index, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void ssi_peripheral_class_init(ObjectClass *klass, void *data)
{
SSIPeripheralClass *ssc = SSI_PERIPHERAL_CLASS(klass);
@@ -81,6 +87,7 @@ static void ssi_peripheral_class_init(ObjectClass *klass, void *data)
if (!ssc->transfer_raw) {
ssc->transfer_raw = ssi_transfer_raw_default;
}
+ device_class_set_props(dc, ssi_peripheral_properties);
}
static const TypeInfo ssi_peripheral_info = {
diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h
index 6950f86810..c5bdf1f216 100644
--- a/include/hw/ssi/ssi.h
+++ b/include/hw/ssi/ssi.h
@@ -64,6 +64,9 @@ struct SSIPeripheral {
/* Chip select state */
bool cs;
+
+ /* Chip select index */
+ uint8_t cs_index;
};
extern const VMStateDescription vmstate_ssi_peripheral;