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| -rw-r--r-- | academic/verilator/slack-desc | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/academic/verilator/slack-desc b/academic/verilator/slack-desc index 1bb74ecb6d0f..050595382bfe 100644 --- a/academic/verilator/slack-desc +++ b/academic/verilator/slack-desc @@ -8,12 +8,12 @@ |-----handy-ruler------------------------------------------------------| verilator: verilator (the fastest free Verilog HDL simulator) verilator: -verilator: Verilator is invoked with parameters similar to GCC or Synopsys’s VCS. -verilator: It "Verilates" the specified synthesizable Verilog or SystemVerilog -verilator: code by reading it, performing lint checks, and optionally inserting -verilator: assertion checks and coverage-analysis points. It outputs single- or -verilator: multi-threaded .cpp and .h files, the "Verilated" code. +verilator: Verilator is invoked with parameters similar to GCC or Synopsys’s +verilator: VCS. It "Verilates" the specified synthesizable Verilog or +verilator: SystemVerilog code by reading it, performing lint checks, and +verilator: optionally inserting assertion checks and coverage-analysis points. +verilator: It outputs single- or verilator: multi-threaded .cpp and .h files, +verilator: the "Verilated" code. verilator: verilator: homepage: https://www.veripool.org/wiki/verilator verilator: -verilator: |