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| author | Willy Sudiarto Raharjo <willysr@slackbuilds.org> | 2017-07-22 14:51:59 +0700 |
|---|---|---|
| committer | Willy Sudiarto Raharjo <willysr@slackbuilds.org> | 2017-07-26 18:28:53 +0700 |
| commit | 0dadefd9217822ee80948c5cf833a98af1ee8a76 (patch) | |
| tree | c7f1af3b9ecc24cfa5d33de0a3afa636396c9aef /development/logisim/README | |
| parent | e3b613ab8d9c4937827bea190556a1f330765331 (diff) | |
development/logisim: Updated for version 2.7.1.
Signed-off-by: Willy Sudiarto Raharjo <willysr@slackbuilds.org>
Diffstat (limited to 'development/logisim/README')
| -rw-r--r-- | development/logisim/README | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/development/logisim/README b/development/logisim/README index 5f8b99e063c70..d4fdecfb8bbac 100644 --- a/development/logisim/README +++ b/development/logisim/README @@ -28,3 +28,5 @@ Features: * The included "combinational analysis" module allows for conversion between circuits, truth tables, and Boolean expressions. +NOTE: The development of this project is suspended +http://www.cburch.com/logisim/retire-note.html |