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| author | Andre Barboza <bmg.andre@gmail.com> | 2013-10-28 15:53:11 +0100 |
|---|---|---|
| committer | Robby Workman <rworkman@slackbuilds.org> | 2013-10-29 20:12:24 -0500 |
| commit | fd672e3c99b4248a3f1b06bd067e5828340e7f96 (patch) | |
| tree | d22044d4fc8ce0521d06db6b70db57d5e7f84a24 /development/gplcver/README | |
| parent | bc800d423ac701f922abd560b7400fd022080b49 (diff) | |
development/gplcver: Added (open-source Verilog simulator).
Signed-off-by: Matteo Bernardini <ponce@slackbuilds.org>
Diffstat (limited to 'development/gplcver/README')
| -rw-r--r-- | development/gplcver/README | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/development/gplcver/README b/development/gplcver/README new file mode 100644 index 0000000000000..2e7321c468295 --- /dev/null +++ b/development/gplcver/README @@ -0,0 +1,5 @@ +Open-source interpreted Verilog simulator with a feature set and +performance similar to Verilog-XL. +Implements all IEEE 1364-1995 features along with some Verilog-2001 +features. +Full support for Verilog PLIs. |