aboutsummaryrefslogtreecommitdiff
path: root/academic/xschem/README
diff options
context:
space:
mode:
authorA. Tomasini <alto.tom@gmail.com>2023-12-04 18:51:16 +0700
committerWilly Sudiarto Raharjo <willysr@slackbuilds.org>2023-12-06 10:09:31 +0700
commiteda3a3abe3fad7e6e262930b42a658ea661c9ff0 (patch)
tree65d7efdf1a2190b928380dfee17042b2c253f372 /academic/xschem/README
parent5074955482e47bb072a8b385113b157c4ef65478 (diff)
academic/xschem: Update script.
Signed-off-by: Andrew Clemons <andrew.clemons@gmail.com> Signed-off-by: Willy Sudiarto Raharjo <willysr@slackbuilds.org>
Diffstat (limited to 'academic/xschem/README')
-rw-r--r--academic/xschem/README2
1 files changed, 1 insertions, 1 deletions
diff --git a/academic/xschem/README b/academic/xschem/README
index 9eed99ce405d6..9af371c59bba7 100644
--- a/academic/xschem/README
+++ b/academic/xschem/README
@@ -15,4 +15,4 @@ be defined by the user -tcl extension language allows the creation
of scripts; any user command in the drawing window has an associated
tcl comand - VHDL / Verilog / Spice netlist, ready for simulation -
Behavioral VHDL / Verilog code can be embedded as one of the properties
-of the schematic block,
+of the schematic block.