diff options
| author | B. Watson <yalhcru@gmail.com> | 2022-03-15 11:27:07 -0400 |
|---|---|---|
| committer | B. Watson <yalhcru@gmail.com> | 2022-03-17 12:38:15 -0400 |
| commit | 2b96e2027ebfe7324f2824bfca457f06fd31a6f3 (patch) | |
| tree | 59a58081301ab5548da512e46988e44b5f2526cd /academic/verilator | |
| parent | 44dcfc2a858a0857092239f679266069bba76eb9 (diff) | |
academic/verilator: Make slack-desc ASCII.
Signed-off-by: B. Watson <yalhcru@gmail.com>
Diffstat (limited to 'academic/verilator')
| -rw-r--r-- | academic/verilator/slack-desc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/academic/verilator/slack-desc b/academic/verilator/slack-desc index 050595382bfe..9cdfb7753538 100644 --- a/academic/verilator/slack-desc +++ b/academic/verilator/slack-desc @@ -8,7 +8,7 @@ |-----handy-ruler------------------------------------------------------| verilator: verilator (the fastest free Verilog HDL simulator) verilator: -verilator: Verilator is invoked with parameters similar to GCC or Synopsys’s +verilator: Verilator is invoked with parameters similar to GCC or Synopsys's verilator: VCS. It "Verilates" the specified synthesizable Verilog or verilator: SystemVerilog code by reading it, performing lint checks, and verilator: optionally inserting assertion checks and coverage-analysis points. |