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/*
* Tiny Code Generator for QEMU
*
* Copyright (c) 2008 Fabrice Bellard
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#define TCG_TARGET_I386 1
#define TCG_TARGET_REG_BITS 32
//#define TCG_TARGET_WORDS_BIGENDIAN
#define TCG_TARGET_NB_REGS 8
enum {
TCG_REG_EAX = 0,
TCG_REG_ECX,
TCG_REG_EDX,
TCG_REG_EBX,
TCG_REG_ESP,
TCG_REG_EBP,
TCG_REG_ESI,
TCG_REG_EDI,
};
/* used for function call generation */
#define TCG_REG_CALL_STACK TCG_REG_ESP
#define TCG_TARGET_STACK_ALIGN 16
#define TCG_TARGET_CALL_STACK_OFFSET 0
/* optional instructions */
#define TCG_TARGET_HAS_div2_i32
#define TCG_TARGET_HAS_rot_i32
#define TCG_TARGET_HAS_ext8s_i32
#define TCG_TARGET_HAS_ext16s_i32
#define TCG_TARGET_HAS_ext8u_i32
#define TCG_TARGET_HAS_ext16u_i32
#define TCG_TARGET_HAS_bswap16_i32
#define TCG_TARGET_HAS_bswap32_i32
#define TCG_TARGET_HAS_neg_i32
#define TCG_TARGET_HAS_not_i32
// #define TCG_TARGET_HAS_andc_i32
// #define TCG_TARGET_HAS_orc_i32
// #define TCG_TARGET_HAS_eqv_i32
// #define TCG_TARGET_HAS_nand_i32
// #define TCG_TARGET_HAS_nor_i32
#define TCG_TARGET_HAS_GUEST_BASE
/* Note: must be synced with dyngen-exec.h */
#define TCG_AREG0 TCG_REG_EBP
static inline void flush_icache_range(unsigned long start, unsigned long stop)
{
}
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