blob: 98a02509bbbec8e1c0b7dbc03c872339692b23f2 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
|
/*
* SH4 cpu parameters for qemu.
*
* Copyright (c) 2005 Samuel Tardieu
* SPDX-License-Identifier: LGPL-2.0+
*/
#ifndef SH4_CPU_PARAM_H
#define SH4_CPU_PARAM_H
#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 12 /* 4k */
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#ifdef CONFIG_USER_ONLY
# define TARGET_VIRT_ADDR_SPACE_BITS 31
#else
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
#define NB_MMU_MODES 2
#endif
|