1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
|
/*
* Support for writing ELF notes for RISC-V architectures
*
* Copyright (C) 2021 Huawei Technologies Co., Ltd
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2 or later, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
#include "cpu.h"
#include "elf.h"
#include "sysemu/dump.h"
/* struct user_regs_struct from arch/riscv/include/uapi/asm/ptrace.h */
struct riscv64_user_regs {
uint64_t pc;
uint64_t regs[31];
} QEMU_PACKED;
QEMU_BUILD_BUG_ON(sizeof(struct riscv64_user_regs) != 256);
/* struct elf_prstatus from include/linux/elfcore.h */
struct riscv64_elf_prstatus {
char pad1[32]; /* 32 == offsetof(struct elf_prstatus, pr_pid) */
uint32_t pr_pid;
char pad2[76]; /* 76 == offsetof(struct elf_prstatus, pr_reg) -
offsetof(struct elf_prstatus, pr_ppid) */
struct riscv64_user_regs pr_reg;
char pad3[8];
} QEMU_PACKED;
QEMU_BUILD_BUG_ON(sizeof(struct riscv64_elf_prstatus) != 376);
struct riscv64_note {
Elf64_Nhdr hdr;
char name[8]; /* align_up(sizeof("CORE"), 4) */
struct riscv64_elf_prstatus prstatus;
} QEMU_PACKED;
#define RISCV64_NOTE_HEADER_SIZE offsetof(struct riscv64_note, prstatus)
#define RISCV64_PRSTATUS_NOTE_SIZE \
(RISCV64_NOTE_HEADER_SIZE + sizeof(struct riscv64_elf_prstatus))
static void riscv64_note_init(struct riscv64_note *note, DumpState *s,
const char *name, Elf64_Word namesz,
Elf64_Word type, Elf64_Word descsz)
{
memset(note, 0, sizeof(*note));
note->hdr.n_namesz = cpu_to_dump32(s, namesz);
note->hdr.n_descsz = cpu_to_dump32(s, descsz);
note->hdr.n_type = cpu_to_dump32(s, type);
memcpy(note->name, name, namesz);
}
int riscv_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
int cpuid, DumpState *s)
{
struct riscv64_note note;
RISCVCPU *cpu = RISCV_CPU(cs);
CPURISCVState *env = &cpu->env;
int ret, i = 0;
const char name[] = "CORE";
riscv64_note_init(¬e, s, name, sizeof(name),
NT_PRSTATUS, sizeof(note.prstatus));
note.prstatus.pr_pid = cpu_to_dump32(s, cpuid);
note.prstatus.pr_reg.pc = cpu_to_dump64(s, env->pc);
for (i = 0; i < 31; i++) {
note.prstatus.pr_reg.regs[i] = cpu_to_dump64(s, env->gpr[i + 1]);
}
ret = f(¬e, RISCV64_PRSTATUS_NOTE_SIZE, s);
if (ret < 0) {
return -1;
}
return ret;
}
struct riscv32_user_regs {
uint32_t pc;
uint32_t regs[31];
} QEMU_PACKED;
QEMU_BUILD_BUG_ON(sizeof(struct riscv32_user_regs) != 128);
struct riscv32_elf_prstatus {
char pad1[24]; /* 24 == offsetof(struct elf_prstatus, pr_pid) */
uint32_t pr_pid;
char pad2[44]; /* 44 == offsetof(struct elf_prstatus, pr_reg) -
offsetof(struct elf_prstatus, pr_ppid) */
struct riscv32_user_regs pr_reg;
char pad3[4];
} QEMU_PACKED;
QEMU_BUILD_BUG_ON(sizeof(struct riscv32_elf_prstatus) != 204);
struct riscv32_note {
Elf32_Nhdr hdr;
char name[8]; /* align_up(sizeof("CORE"), 4) */
struct riscv32_elf_prstatus prstatus;
} QEMU_PACKED;
#define RISCV32_NOTE_HEADER_SIZE offsetof(struct riscv32_note, prstatus)
#define RISCV32_PRSTATUS_NOTE_SIZE \
(RISCV32_NOTE_HEADER_SIZE + sizeof(struct riscv32_elf_prstatus))
static void riscv32_note_init(struct riscv32_note *note, DumpState *s,
const char *name, Elf32_Word namesz,
Elf32_Word type, Elf32_Word descsz)
{
memset(note, 0, sizeof(*note));
note->hdr.n_namesz = cpu_to_dump32(s, namesz);
note->hdr.n_descsz = cpu_to_dump32(s, descsz);
note->hdr.n_type = cpu_to_dump32(s, type);
memcpy(note->name, name, namesz);
}
int riscv_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
int cpuid, DumpState *s)
{
struct riscv32_note note;
RISCVCPU *cpu = RISCV_CPU(cs);
CPURISCVState *env = &cpu->env;
int ret, i;
const char name[] = "CORE";
riscv32_note_init(¬e, s, name, sizeof(name),
NT_PRSTATUS, sizeof(note.prstatus));
note.prstatus.pr_pid = cpu_to_dump32(s, cpuid);
note.prstatus.pr_reg.pc = cpu_to_dump32(s, env->pc);
for (i = 0; i < 31; i++) {
note.prstatus.pr_reg.regs[i] = cpu_to_dump32(s, env->gpr[i + 1]);
}
ret = f(¬e, RISCV32_PRSTATUS_NOTE_SIZE, s);
if (ret < 0) {
return -1;
}
return ret;
}
int cpu_get_dump_info(ArchDumpInfo *info,
const GuestPhysBlockList *guest_phys_blocks)
{
RISCVCPU *cpu;
CPURISCVState *env;
if (first_cpu == NULL) {
return -1;
}
cpu = RISCV_CPU(first_cpu);
env = &cpu->env;
info->d_machine = EM_RISCV;
#if defined(TARGET_RISCV64)
info->d_class = ELFCLASS64;
#else
info->d_class = ELFCLASS32;
#endif
info->d_endian = (env->mstatus & MSTATUS_UBE) != 0 ?
ELFDATA2MSB : ELFDATA2LSB;
return 0;
}
ssize_t cpu_get_note_size(int class, int machine, int nr_cpus)
{
size_t note_size;
if (class == ELFCLASS64) {
note_size = RISCV64_PRSTATUS_NOTE_SIZE;
} else {
note_size = RISCV32_PRSTATUS_NOTE_SIZE;
}
return note_size * nr_cpus;
}
|
