blob: 5c5aa0c053d2712b846a846117292ef3aaf0212d (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
|
/*
* QEMU HPPA CPU
*
* Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see
* <http://www.gnu.org/licenses/lgpl-2.1.html>
*/
#ifndef QEMU_HPPA_CPU_QOM_H
#define QEMU_HPPA_CPU_QOM_H
#include "hw/core/cpu.h"
#include "qom/object.h"
#define TYPE_HPPA_CPU "hppa-cpu"
typedef struct HPPACPU HPPACPU;
typedef struct HPPACPUClass HPPACPUClass;
DECLARE_OBJ_CHECKERS(HPPACPU, HPPACPUClass,
HPPA_CPU, TYPE_HPPA_CPU)
/**
* HPPACPUClass:
* @parent_realize: The parent class' realize handler.
* @parent_reset: The parent class' reset handler.
*
* An HPPA CPU model.
*/
struct HPPACPUClass {
/*< private >*/
CPUClass parent_class;
/*< public >*/
DeviceRealize parent_realize;
DeviceReset parent_reset;
};
#endif
|