1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
|
/*
* AVR 16-bit timer
*
* Copyright (c) 2018 University of Kent
* Author: Ed Robbins
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see
* <http://www.gnu.org/licenses/lgpl-2.1.html>
*/
/*
* Driver for 16 bit timers on 8 bit AVR devices.
* Note:
* On ATmega640/V-1280/V-1281/V-2560/V-2561/V timers 1, 3, 4 and 5 are 16 bit
*/
#ifndef HW_TIMER_AVR_TIMER16_H
#define HW_TIMER_AVR_TIMER16_H
#include "hw/sysbus.h"
#include "qemu/timer.h"
#include "hw/hw.h"
#include "qom/object.h"
enum NextInterrupt {
OVERFLOW,
COMPA,
COMPB,
COMPC,
CAPT
};
#define TYPE_AVR_TIMER16 "avr-timer16"
typedef struct AVRTimer16State AVRTimer16State;
#define AVR_TIMER16(obj) \
OBJECT_CHECK(AVRTimer16State, (obj), TYPE_AVR_TIMER16)
struct AVRTimer16State {
/* <private> */
SysBusDevice parent_obj;
/* <public> */
MemoryRegion iomem;
MemoryRegion imsk_iomem;
MemoryRegion ifr_iomem;
QEMUTimer *timer;
qemu_irq capt_irq;
qemu_irq compa_irq;
qemu_irq compb_irq;
qemu_irq compc_irq;
qemu_irq ovf_irq;
bool enabled;
/* registers */
uint8_t cra;
uint8_t crb;
uint8_t crc;
uint8_t cntl;
uint8_t cnth;
uint8_t icrl;
uint8_t icrh;
uint8_t ocral;
uint8_t ocrah;
uint8_t ocrbl;
uint8_t ocrbh;
uint8_t ocrcl;
uint8_t ocrch;
/*
* Reads and writes to CNT and ICR utilise a bizarre temporary
* register, which we emulate
*/
uint8_t rtmp;
uint8_t imsk;
uint8_t ifr;
uint8_t id;
uint64_t cpu_freq_hz;
uint64_t freq_hz;
uint64_t period_ns;
uint64_t reset_time_ns;
enum NextInterrupt next_interrupt;
};
#endif /* HW_TIMER_AVR_TIMER16_H */
|