aboutsummaryrefslogtreecommitdiff
path: root/include/hw/mips/cps.h
blob: a941c55f27e7f6619a92f054eb21a57ff84c7d94 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
/*
 * Coherent Processing System emulation.
 *
 * Copyright (c) 2016 Imagination Technologies
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */

#ifndef MIPS_CPS_H
#define MIPS_CPS_H

#include "hw/sysbus.h"
#include "hw/misc/mips_cmgcr.h"
#include "hw/intc/mips_gic.h"
#include "hw/misc/mips_cpc.h"
#include "hw/misc/mips_itu.h"
#include "target/mips/cpu.h"

#define TYPE_MIPS_CPS "mips-cps"
#define MIPS_CPS(obj) OBJECT_CHECK(MIPSCPSState, (obj), TYPE_MIPS_CPS)

typedef struct MIPSCPSState {
    SysBusDevice parent_obj;

    uint32_t num_vp;
    uint32_t num_irq;
    char *cpu_type;

    MemoryRegion container;
    MIPSGCRState gcr;
    MIPSGICState gic;
    MIPSCPCState cpc;
    MIPSITUState itu;
} MIPSCPSState;

qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number);

#endif