1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
|
#ifndef QEMU_HW_MILKYMIST_HW_H
#define QEMU_HW_MILKYMIST_HW_H
#include "hw/qdev-core.h"
#include "net/net.h"
#include "qapi/error.h"
static inline DeviceState *milkymist_uart_create(hwaddr base,
qemu_irq irq,
Chardev *chr)
{
DeviceState *dev;
dev = qdev_new("milkymist-uart");
qdev_prop_set_chr(dev, "chardev", chr);
qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
return dev;
}
static inline DeviceState *milkymist_hpdmc_create(hwaddr base)
{
DeviceState *dev;
dev = qdev_new("milkymist-hpdmc");
qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
return dev;
}
static inline DeviceState *milkymist_memcard_create(hwaddr base)
{
DeviceState *dev;
dev = qdev_new("milkymist-memcard");
qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
return dev;
}
static inline DeviceState *milkymist_vgafb_create(hwaddr base,
uint32_t fb_offset, uint32_t fb_mask)
{
DeviceState *dev;
dev = qdev_new("milkymist-vgafb");
qdev_prop_set_uint32(dev, "fb_offset", fb_offset);
qdev_prop_set_uint32(dev, "fb_mask", fb_mask);
qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
return dev;
}
static inline DeviceState *milkymist_sysctl_create(hwaddr base,
qemu_irq gpio_irq, qemu_irq timer0_irq, qemu_irq timer1_irq,
uint32_t freq_hz, uint32_t system_id, uint32_t capabilities,
uint32_t gpio_strappings)
{
DeviceState *dev;
dev = qdev_new("milkymist-sysctl");
qdev_prop_set_uint32(dev, "frequency", freq_hz);
qdev_prop_set_uint32(dev, "systemid", system_id);
qdev_prop_set_uint32(dev, "capabilities", capabilities);
qdev_prop_set_uint32(dev, "gpio_strappings", gpio_strappings);
qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, gpio_irq);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, timer0_irq);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, timer1_irq);
return dev;
}
static inline DeviceState *milkymist_pfpu_create(hwaddr base,
qemu_irq irq)
{
DeviceState *dev;
dev = qdev_new("milkymist-pfpu");
qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
return dev;
}
static inline DeviceState *milkymist_ac97_create(hwaddr base,
qemu_irq crrequest_irq, qemu_irq crreply_irq, qemu_irq dmar_irq,
qemu_irq dmaw_irq)
{
DeviceState *dev;
dev = qdev_new("milkymist-ac97");
qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, crrequest_irq);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, crreply_irq);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, dmar_irq);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 3, dmaw_irq);
return dev;
}
static inline DeviceState *milkymist_minimac2_create(hwaddr base,
hwaddr buffers_base, qemu_irq rx_irq, qemu_irq tx_irq)
{
DeviceState *dev;
qemu_check_nic_model(&nd_table[0], "minimac2");
dev = qdev_new("milkymist-minimac2");
qdev_set_nic_properties(dev, &nd_table[0]);
qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, buffers_base);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, rx_irq);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, tx_irq);
return dev;
}
static inline DeviceState *milkymist_softusb_create(hwaddr base,
qemu_irq irq, uint32_t pmem_base, uint32_t pmem_size,
uint32_t dmem_base, uint32_t dmem_size)
{
DeviceState *dev;
dev = qdev_new("milkymist-softusb");
qdev_prop_set_uint32(dev, "pmem_size", pmem_size);
qdev_prop_set_uint32(dev, "dmem_size", dmem_size);
qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, pmem_base);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, dmem_base);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
return dev;
}
#endif /* QEMU_HW_MILKYMIST_HW_H */
|
