blob: ade18a3fe1306fe6b7ca48ee5d5f9f574a24e97e (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
|
Xilinx Zynq board (``xilinx-zynq-a9``)
======================================
The Zynq 7000 family is based on the AMD SoC architecture. These products
integrate a feature-rich dual or single-core Arm Cortex-A9 MPCore based
processing system (PS) and AMD programmable logic (PL) in a single device.
More details here:
https://docs.amd.com/r/en-US/ug585-zynq-7000-SoC-TRM/Zynq-7000-SoC-Technical-Reference-Manual
QEMU xilinx-zynq-a9 board supports following devices:
- A9 MPCORE
- cortex-a9
- GIC v1
- Generic timer
- wdt
- OCM 256KB
- SMC SRAM@0xe2000000 64MB
- Zynq SLCR
- SPI x2
- QSPI
- UART
- TTC x2
- Gigabit Ethernet Controller x2
- SD Controller x2
- XADC
- Arm PrimeCell DMA Controller
- DDR Memory
- USB 2.0 x2
Running
"""""""
Direct Linux boot of a generic ARM upstream Linux kernel:
.. code-block:: bash
$ qemu-system-aarch64 -M xilinx-zynq-a9 \
-dtb zynq-zc702.dtb -serial null -serial mon:stdio \
-display none -m 1024 \
-initrd rootfs.cpio.gz -kernel zImage
For configuring the boot-mode provide the following on the command line:
.. code-block:: bash
-machine boot-mode=qspi
Supported values are jtag, sd, qspi, nor.
|
