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2019-03-06Merge remote-tracking branch ↵Peter Maydell
'remotes/dgilbert/tags/pull-migration-20190306a' into staging Migation pull 2019-03-06 (This replaces the pull sent yesterday) a) 4 small fixes including the cancel problem that caused the ahci migration test to fail intermittently b) Yury's ignore-shared feature c) Juan's extra tests d) Wei Wang's free page hinting e) Some Colo fixes from Zhang Chen Diff from yesterdays pull: 1) A missing fix of mine (cleanup during exit) 2) Changes from Eric/Markus on 'Create socket-address parameter' # gpg: Signature made Wed 06 Mar 2019 11:39:53 GMT # gpg: using RSA key 0516331EBC5BFDE7 # gpg: Good signature from "Dr. David Alan Gilbert (RH2) <dgilbert@redhat.com>" [full] # Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B FDE7 * remotes/dgilbert/tags/pull-migration-20190306a: (22 commits) qapi/migration.json: Remove a variable that doesn't exist in example Migration/colo.c: Make COLO node running after failover Migration/colo.c: Fix double close bug when occur COLO failover virtio-balloon: VIRTIO_BALLOON_F_FREE_PAGE_HINT migration/ram.c: add the free page optimization enable flag migration/ram.c: add a notifier chain for precopy migration: API to clear bits of guest free pages from the dirty bitmap migration: use bitmap_mutex in migration_bitmap_clear_dirty bitmap: bitmap_count_one_with_offset bitmap: fix bitmap_count_one tests: Add basic migration precopy tcp test migration: Create socket-address parameter tests: Add migration xbzrle test migration: Add capabilities validation tests/migration-test: Add a test for ignore-shared capability migration: Add an ability to ignore shared RAM blocks migration: Introduce ignore-shared capability exec: Change RAMBlockIterFunc definition migration/rdma: clang compilation fix migration: Cleanup during exit ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-06Merge remote-tracking branch ↵Peter Maydell
'remotes/vivier2/tags/trivial-branch-pull-request' into staging trivial patches pull request (20190206) - acpi: remove unused functions/variables - tests: remove useless architecture checks - some typo fixes and documentation update - flash_cfi02: fix memory leak # gpg: Signature made Wed 06 Mar 2019 11:05:12 GMT # gpg: using RSA key F30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-pull-request: thunk: fix of malloc to g_new hostmem-file: simplify ifdef-s in file_backend_memory_alloc() build: Correct explanation of unnest-vars example bswap: Fix accessors syntax in comment doc: fix typos for documents in tree block/pflash_cfi02: Fix memory leak and potential use-after-free hw/acpi: remove unnecessary variable acpi_table_builtin hw/acpi: remove unused function acpi_table_add_builtin() hw/i386/pc.c: remove unused function pc_acpi_init() tests: Remove (mostly) useless architecture checks Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-06tests: Add basic migration precopy tcp testJuan Quintela
Not sharing code from precopy/unix because we have to read back the tcp parameter. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20190227105128.1655-4-quintela@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> dgilbert: Fixup for clash with Yury's
2019-03-06tests: Add migration xbzrle testJuan Quintela
Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com> Message-Id: <20190227105128.1655-2-quintela@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> dgilbert: Fixup for class with Yury's series
2019-03-06tests/migration-test: Add a test for ignore-shared capabilityYury Kotov
Signed-off-by: Yury Kotov <yury-kotov@yandex-team.ru> Message-Id: <20190215174548.2630-5-yury-kotov@yandex-team.ru> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> dgilbert: Disabled the test for now, not happy on aarch64
2019-03-06tests: Remove (mostly) useless architecture checksThomas Huth
These checks at the beginning of some of the tests are mostly useless: We only run the tests on x86 anyway, and g_test_message() does not print anything unless you call g_test_init() first. Signed-off-by: Thomas Huth <thuth@redhat.com> Acked-by: John Snow <jsnow@redhat.com> Acked-by: Corey Minyard <cminyard@mvista.com> Message-Id: <1551456970-463-1-git-send-email-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-03-05Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-mar-05-2019' ↵Peter Maydell
into staging MIPS queue for March 5th, 2019 # gpg: Signature made Tue 05 Mar 2019 16:06:34 GMT # gpg: using RSA key D4972A8967F75A65 # gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65 * remotes/amarkovic/tags/mips-queue-mar-05-2019: target/mips: Add tests for integer add MSA instruction group tests/tcg: target/mips: Add tests for MSA pack instructions tests/tcg: target/mips: Add tests for MIPS64R6 int multiply instructions tests/tcg: target/mips: Add tests for MIPS64R6 shift instructions tests/tcg: target/mips: Add tests for MIPS64R6 bit count instructions tests/tcg: target/mips: Add tests for MIPS64R6 bit swap instructions tests/tcg: target/mips: Add tests for MIPS64R6 logic instructions tests/tcg: target/mips: Add wrappers for some MIPS64R6 instructions tests/tcg: target/mips: Extend functionality of MSA wrapper macros tests/tcg: target/mips: Fix test utilities for 128-bit tests tests/tcg: target/mips: Add test utilities for 64-bit tests tests/tcg: target/mips: Add test utilities for 32-bit tests tests/tcg: target/mips: Add wrappers for various MSA instructions disas: nanoMIPS: Add graphical description of pool organization disas: nanoMIPS: Correct comments to handlers of some DSP instructions Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-05target/mips: Add tests for integer add MSA instruction groupMateja Marjanovic
These are the regression tests for integer addition MSA instruction - various flavors of instruction add (ADD, ADDS, HADD,...). Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1551718283-4487-3-git-send-email-mateja.marjanovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add tests for MSA pack instructionsAleksandar Markovic
Add tests for MSA pack instructions. This includes following instructions: * PCKEV.B - pack even (bytes) * PCKEV.H - pack even (halfwords) * PCKEV.W - pack even (words) * PCKEV.D - pack even (doublewords) * PCKOD.B - pack odd (bytes) * PCKOD.H - pack odd (halfwords) * PCKOD.W - pack odd (words) * PCKOD.D - pack odd (doublewords) * VSHF.B - data preserving shuffle (bytes) * VSHF.H - data preserving shuffle (halfwords) * VSHF.W - data preserving shuffle (words) * VSHF.D - data preserving shuffle (doublewords) Each test consists of 80 test cases, so altogether there are 960 test cases. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-15-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add tests for MIPS64R6 int multiply instructionsAleksandar Markovic
Add tests for MIPS64R6 integer multiply instructions: MUL, MUH, MULU, MUHU, DMUL, DMUH, DMULU, and DMUHU. MUH and MUHU require 64 bit inputs in the form of 64-bit sign-extended 32-bit inputs. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-14-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add tests for MIPS64R6 shift instructionsAleksandar Markovic
Add tests for MIPS64R6 shift instructions: SLLV, SRLV, SRAV, DSLLV, DSRLV, and DSRAV. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-13-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add tests for MIPS64R6 bit count instructionsAleksandar Markovic
Add tests for MIPS64R6 bit count instructions: CLO, CLZ, DCLO, and DCLZ. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-12-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add tests for MIPS64R6 bit swap instructionsAleksandar Markovic
Add tests for MIPS64R6 bit swap instructions: BITSWAP and DBITSWAP. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-11-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add tests for MIPS64R6 logic instructionsAleksandar Markovic
Add tests for MIPS64R6 logic instructions: AND, NOR, OR, and XOR. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-10-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add wrappers for some MIPS64R6 instructionsAleksandar Markovic
Add wrappers for some MIPS64R6 instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-9-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Extend functionality of MSA wrapper macrosAleksandar Markovic
Add macros that will allow testing cases when one of the source registers is identical to the destination register. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-8-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Fix test utilities for 128-bit testsAleksandar Markovic
Add "static" and "const" modifiers where appropriate, and fix other minor issues. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-7-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add test utilities for 64-bit testsAleksandar Markovic
Add test utilities for 64-bit tests. Some of MIPS64R6 instructions require 64-bit inputs to be 32-bit integers sign-extedned to 64 bits, hence the need for sets of such inputs. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-6-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add test utilities for 32-bit testsAleksandar Markovic
Add test utilities for 32-bit tests. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-5-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add wrappers for various MSA instructionsAleksandar Markovic
Add wrappers for various MSA integer instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-4-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05qapi: Fix array first used in a different moduleMarkus Armbruster
We generally put implicitly defined types in whatever module triggered their definition. This is wrong for array types, as the included test case demonstrates. Let's have a closer look at it. Type 'Status' is defined sub-sub-module.json. Array type ['Status'] occurs in main module qapi-schema-test.json and in include/sub-module.json. The main module's use is first, so the array type gets put into the main module. The generated C headers define StatusList in qapi-types.h. But include/qapi-types-sub-module.h uses it without including qapi-types.h. Oops. To fix that, put the array type into its element type's module. Now StatusList gets generated into qapi-types-sub-module.h, which all its users include. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190301154051.23317-8-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2019-03-05tests/qapi-schema: Cover forward reference to sub-moduleMarkus Armbruster
The forward reference from the main module to the sub-module works fine, except for an issue visible in qapi-schema-test.out: the array type wrapped around the forward reference ends up in the main module, not the sub-module. The next commit will explain why that's bad, and fix it. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190301154051.23317-7-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2019-03-05tests: Rename UserDefNativeListUnion to UserDefListUnionMarkus Armbruster
The lists in UserDefNativeListUnion aren't "native", they're lists of built-in types. The next commit will add a list of a user-defined type. Drop "Native", and adjust the tests using the type. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190301154051.23317-6-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2019-03-05qapi: Fix code generation for sub-modules in other directoriesMarkus Armbruster
The #include directives to pull in sub-modules use file names relative to the main module. Works only when all modules are in the same directory, or the main module's output directory is in the compiler's include path. Use relative file names instead. The dummy variable we generate to avoid empty .o files has an invalid name for sub-modules in other directories. Fix that. Both messed up in commit 252dc3105fc "qapi: Generate separate .h, .c for each module". Escaped testing because tests/qapi-schema-test.json doesn't cover sub-modules in other directories, only tests/qapi-schema/include-relpath.json does, and we generate and compile C code only for the former, not the latter. Fold the latter into the former. This would have caught the mistakes fixed in this commit. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190301154051.23317-5-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2019-03-05tests/qapi-schema: Cover conditional arraysMarkus Armbruster
Commit 967c885108f neglected to cover arrays of conditional types. Do that now. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190301154051.23317-3-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2019-03-05tests/qapi-schema: Make test-qapi.py print arraysMarkus Armbruster
The next few commits mess with array types, and having the changes exposed in output of test-qapi.py will be useful. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190301154051.23317-2-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> [Rationale added to commit message]
2019-03-05tests: Add a test for qemu self announcementsDr. David Alan Gilbert
We now expose qemu_announce_self through QMP and HMP. Add a test with some very basic packet validation (make sure we get a RARP). Signed-off-by: Vlad Yasevich <vyasevic@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2019-03-05hmp: Add hmp_announce_selfDr. David Alan Gilbert
Add an HMP command to trigger self annocements. Unlike the QMP command (which takes a set of parameters), the HMP command reuses the set of parameters used for migration. Signend-off-by: Vladislav Yasevich <vyasevic@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2019-03-04Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell
pci, pc, virtio: fixes, cleanups, tests Lots of work on tests: BiosTablesTest UEFI app, vhost-user testing for non-Linux hosts. Misc cleanups and fixes all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Fri 22 Feb 2019 15:51:40 GMT # gpg: using RSA key 281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (26 commits) pci: Sanity test minimum downstream LNKSTA hw/smbios: fix offset of type 3 sku field pci: Move NVIDIA vendor id to the rest of ids virtio-balloon: Safely handle BALLOON_PAGE_SIZE < host page size virtio-balloon: Use ram_block_discard_range() instead of raw madvise() virtio-balloon: Rework ballon_page() interface virtio-balloon: Corrections to address verification virtio-balloon: Remove unnecessary MADV_WILLNEED on deflate i386/kvm: ignore masked irqs when update msi routes contrib/vhost-user-blk: fix the compilation issue Revert "contrib/vhost-user-blk: fix the compilation issue" pc-dimm: use same mechanism for [get|set]_addr tests/data: introduce "uefi-boot-images" with the "bios-tables-test" ISOs tests/uefi-test-tools: add build scripts tests: introduce "uefi-test-tools" with the BiosTablesTest UEFI app roms: build the EfiRom utility from the roms/edk2 submodule roms: add the edk2 project as a git submodule vhost-user-test: create a temporary directory per TestServer vhost-user-test: small changes to init_hugepagefs vhost-user-test: create a main loop per TestServer ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-01Merge remote-tracking branch ↵Peter Maydell
'remotes/huth-gitlab/tags/pull-request-2019-02-28' into staging - Updates to MAINTAINERS file - Re-enable the guest-agent test - Add the possibility to load a bios image on the mcf5208evb machine # gpg: Signature made Thu 28 Feb 2019 12:23:25 GMT # gpg: using RSA key 2ED9D774FE702DB5 # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2019-02-28: hw/m68k/mcf5208: Support loading of bios images tests/test-qga: Reenable guest-agent qtest MAINTAINERS: Clean up the RISC-V TCG backend section MAINTAINERS: Add some missing entries for the sun4m machine MAINTAINERS: Add maintainer to the TCG/i386 subsystem MAINTAINERS: Add maintainers to the Linux subsystem MAINTAINERS: Orphanize the 'GDB stub' subsystem MAINTAINERS: Add maintainer to the POSIX subsystem MAINTAINERS: Add an entry for the Dino machine MAINTAINERS: Add missing test entries to the Cryptography section MAINTAINERS: Add missing entries for the QObject section MAINTAINERS: Add missing entries for the PC machines MAINTAINERS: Add missing entries for the sun4u machines Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-28Merge remote-tracking branch 'remotes/xtensa/tags/20190228-xtensa' into stagingPeter Maydell
target/xtensa: FLIX support, various fixes and test improvements - add FLIX (flexible length instructions extension) support; - make testsuite runnable on wider range of xtensa cores; - add floating point opcode tests; - don't add duplicate 'static' in import_core.sh script; - fix undefined opcodes detection in test_mmuhifi_c3 overlay. # gpg: Signature made Thu 28 Feb 2019 12:53:23 GMT # gpg: using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044 # gpg: issuer "jcmvbkbc@gmail.com" # gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown] # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" [full] # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" [full] # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20190228-xtensa: (40 commits) tests/tcg/xtensa: add FPU2000 coprocessor tests tests/tcg/xtensa: add FP1 group tests tests/tcg/xtensa: add FP0 group conversion tests tests/tcg/xtensa: add FP0 group arithmetic tests tests/tcg/xtensa: add LSCI/LSCX group tests tests/tcg/xtensa: add test for FLIX tests/tcg/xtensa: conditionalize MMU-related tests tests/tcg/xtensa: conditionalize windowed register tests tests/tcg/xtensa: conditionalize and fix s32c1i tests tests/tcg/xtensa: fix SR tests for big endian configs tests/tcg/xtensa: conditionalize and expand SR tests tests/tcg/xtensa: conditionalize timer/CCOUNT tests tests/tcg/xtensa: conditionalize interrupt tests tests/tcg/xtensa: add straightforward conditionals tests/tcg/xtensa: conditionalize cache option tests tests/tcg/xtensa: conditionalize debug option tests tests/tcg/xtensa: enable boolean tests tests/tcg/xtensa: fix endianness issues in test_b tests/tcg/xtensa: don't use optional opcodes in generic code tests/tcg/xtensa: support configs with LITBASE ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-28Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-feb-27-2019' ↵Peter Maydell
into staging MIPS queue for February 27th, 2019 # gpg: Signature made Wed 27 Feb 2019 13:27:36 GMT # gpg: using RSA key D4972A8967F75A65 # gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65 * remotes/amarkovic/tags/mips-queue-feb-27-2019: target/mips: Preparing for adding MMI instructions tests/tcg: target/mips: Add tests for MSA integer max/min instructions tests/tcg: target/mips: Add wrappers for MSA integer max/min instructions qemu-doc: Add section on MIPS' Boston board qemu-doc: Add section on MIPS' Fulong 2E board qemu-doc: Move section on MIPS' mipssim pseudo board disas: nanoMIPS: Fix a function misnomer tests/tcg: target/mips: Add tests for MSA integer compare instructions Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-28tests/tcg/xtensa: add FPU2000 coprocessor testsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add FP1 group testsMax Filippov
Test comparisons and conditional move operations. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add FP0 group conversion testsMax Filippov
Test conversions for normal, NaN and Inf arguments. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add FP0 group arithmetic testsMax Filippov
Test arithmetic operations for normal, NaN and Inf arguments. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add LSCI/LSCX group testsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add test for FLIXMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize MMU-related testsMax Filippov
Make MMU-related tests conditional on the presence of MMUv2 option. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize windowed register testsMax Filippov
Make windowed register tests conditional on the presence of this option. Fix tests to work correctly for both 32 and 64 physical registers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize and fix s32c1i testsMax Filippov
Make s32c1i tests conditional on the presence of this option. Initialize ATOMCTL SR when it's present to allow RCW transactions on uncached memory. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: fix SR tests for big endian configsMax Filippov
SR tests generate instructions that the assembler does not recognize and thus must take care about configuration endianness. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize and expand SR testsMax Filippov
Make tests for specific special registers conditional on the presence of the options that add these registers and test that the registers are not accessible otherwise. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize timer/CCOUNT testsMax Filippov
Make timer/CCOUNT tests conditional on the presence of timer option and number of configured timers. Don't use hard coded interrupt levels for timers, use configured values. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize interrupt testsMax Filippov
Make interrupt tests conditional on the presence of interrupt option and on the presence of level-1 and high level software interrupts. Don't use hard-coded interrupt level for the high level interrupt tests, choose high level software IRQ and use its configured level. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add straightforward conditionalsMax Filippov
Make tests for optional instruction groups conditional on the presence of corresponding options in the config. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize cache option testsMax Filippov
Make data/instruction tests conditional on the presence of data/instruction cache, whether they're lockable and whether data cache is writeback. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize debug option testsMax Filippov
Make debug tests conditional on the presence of the debug option in the config and tests that depend on the presence/number of instruction or data breakpoint registers on the corresponding definitions. Use configured debug interrupt level instead of the hardcoded value to set up IRQ handler and access debug EPC register. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: enable boolean testsMax Filippov
Uncomment test_boolean in the test makefile. Make actual tests code conditional on the presence of boolean option in the config. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: fix endianness issues in test_bMax Filippov
Use bbci.l/bbsi.l instead of bbci/bbsi, as they are assembly macros that accept little-endian bit number and produce correct immediate for both little and big endian configurations. Choose value loaded into register for bbc/bbs opcodes based on configuration endianness. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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