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2016-06-07tests: Remove unnecessary glib.h includesPeter Maydell
Remove glib.h includes, as it is provided by osdep.h. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Tested-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-02-16tests: Clean up includesPeter Maydell
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Tested-by: Eric Blake <eblake@redhat.com>
2015-07-08tco-test: fix up config accesses and re-enableMichael S. Tsirkin
The mistake that made the test fail was that it tried to use a BAR address as an offset for config accesses to LPC. Config accesses don't need a BAR, and LPC does not have one. Don't attempt to map it. With this change applied, TCO test passes, so re-enable it. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-07-08ich9: implement strap SPKR pin logicPaulo Alcantara
If the signal is sampled high, this indicates that the system is strapped to the "No Reboot" mode (ICH9 will disable the TCO Timer system reboot feature). The status of this strap is readable via the NO_REBOOT bit (CC: offset 0x3410:bit 5). The NO_REBOOT bit is set when SPKR pin on ICH9 is sampled high. This bit may be set or cleared by software if the strap is sampled low but may not override the strap when it indicates "No Reboot". This patch implements the logic where hardware has ability to set SPKR pin through a property named "noreboot" and it's sampled high by default. Signed-off-by: Paulo Alcantara <pcacjr@zytor.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-07-08tests: add testcase for TCO watchdog emulationPaulo Alcantara
This patch adds a testcase that covers the following: 1) TCO default values 2) first and second TCO timeout 3) watch and validate ticks counter through TCO_RLD register 4) maximum supported TCO timeout (0x3ff) 5) watchdog actions (pause/reset/shutdown/none) upon second TCO timeout 6) set and get of TCO control and status bits MST: The test does not pass yet, so it's disabled by default. Signed-off-by: Paulo Alcantara <pcacjr@zytor.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>