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2022-01-04target/ppc: do not silence snan in xscvspdpnMatheus Ferst
The non-signalling versions of VSX scalar convert to shorter/longer precision insns doesn't silence SNaNs in the hardware. To better match this behavior, use the non-arithmatic conversion of helper_todouble instead of float32_to_float64. A test is added to prevent future regressions. Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20211228120310.1957990-1-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-12-30target/hppa: Fix atomic_store_3 for STBYRichard Henderson
The parallel version of STBY did not take host endianness into account, and also computed the incorrect address for STBY_E. Bswap twice to handle the merge and store. Compute mask inside the function rather than as a parameter. Force align the address, rather than subtracting one. Generalize the function to system mode by using probe_access(). Cc: qemu-stable@nongnu.org Tested-by: Helge Deller <deller@gmx.de> Reported-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-30tests/tcg: Unconditionally use 90 second timeoutRichard Henderson
The cross-i386-tci test has timeouts because we're no longer applying the timeout that we desired. Hack around it. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Fixes: 23a77b2d18b8 ("build-system: clean up TCG/TCI configury") Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-30tests/tcg: Use $cpu in configure.shRichard Henderson
Use $cpu instead of $ARCH, which has been removed from the top-level configure. Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Fixes: 823eb013452e ("configure, meson: move ARCH to meson.build") Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-18configure: unify ppc64 and ppc64lePaolo Bonzini
The only difference between the two, as far as either configure or Meson are concerned, is the default endianness of the compiler. For tests/tcg, specify the endianness explicitly on the command line; for configure, do the same so that it is possible to have --cpu=ppc64le on a bigendian system or vice versa. Apart from this, cpu=ppc64le can be normalized to ppc64 also in configure and not just in the meson cross file. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-12-17Merge tag 'pull-ppc-20211217' of https://github.com/legoater/qemu into stagingRichard Henderson
ppc 7.0 queue: * General cleanup for Mac machines (Peter) * Fixes for FPU exceptions (Lucas) * Support for new ISA31 instructions (Matheus) * Fixes for ivshmem (Daniel) * Cleanups for PowerNV PHB (Christophe and Cedric) * Updates of PowerNV and pSeries documentation (Leonardo and Daniel) * Fixes for PowerNV (Daniel) * Large cleanup of FPU implementation (Richard) * Removal of SoftTLBs support for PPC74x CPUs (Fabiano) * Fixes for exception models in MPCx and 60x CPUs (Fabiano) * Removal of 401/403 CPUs (Cedric) * Deprecation of taihu machine (Thomas) * Large rework of PPC405 machine (Cedric) * Fixes for VSX instructions (Victor and Matheus) * Fix for e6500 CPU (Fabiano) * Initial support for PMU (Daniel) # gpg: Signature made Fri 17 Dec 2021 09:20:31 AM PST # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-ppc-20211217' of https://github.com/legoater/qemu: (101 commits) ppc/pnv: Use QOM hierarchy to scan PEC PHB4 devices ppc/pnv: Move realize of PEC stacks under the PEC model ppc/pnv: Remove "system-memory" property from PHB4 PEC ppc/pnv: Compute the PHB index from the PHB4 PEC model ppc/pnv: Introduce a num_stack class attribute ppc/pnv: Introduce a "chip" property under the PHB4 model ppc/pnv: Introduce version and device_id class atributes for PHB4 devices ppc/pnv: Introduce a num_pecs class attribute for PHB4 PEC devices ppc/pnv: Use QOM hierarchy to scan PHB3 devices ppc/pnv: Move mapping of the PHB3 CQ regions under pnv_pbcq_realize() ppc/pnv: Drop the "num-phbs" property ppc/pnv: Use the chip class to check the index of PHB3 devices ppc/pnv: Introduce a "chip" property under PHB3 PPC64/TCG: Implement 'rfebb' instruction target/ppc/power8-pmu.c: add PM_RUN_INST_CMPL (0xFA) event target/ppc: enable PMU instruction count target/ppc: enable PMU counter overflow with cycle events target/ppc: PMU: update counters on MMCR1 write target/ppc: PMU: update counters on PMCs r/w target/ppc: PMU basic cycle count for pseries TCG ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-17test/tcg/ppc64le: test mtfsfLucas Mateus Castro (alqotel)
Added tests for the mtfsf to check if FI bit of FPSCR is being set and if exception calls are being made correctly. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20211201163808.440385-3-lucas.araujo@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-12-15tests/tcg: Add arm and aarch64 pc alignment testsRichard Henderson
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-11-17tests/tcg/ppc64le: Fix compile flags for byte_reverseRichard Henderson
With a host compiler new enough to recognize power10 insns, CROSS_CC_HAS_POWER10 is true, but we do not supply the -cpu option to the compiler, resulting in /tmp/ccAVdYJd.s: Assembler messages: /tmp/ccAVdYJd.s:49: Error: unrecognized opcode: `brh' /tmp/ccAVdYJd.s:78: Error: unrecognized opcode: `brw' /tmp/ccAVdYJd.s:107: Error: unrecognized opcode: `brd' make[2]: *** [byte_reverse] Error 1 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-11-04Merge remote-tracking branch 'remotes/stsquad/tags/pull-for-6.2-041121-2' ↵Richard Henderson
into staging Testing, gdbstub and plugin updates for 6.2 - add microblaze and nios2 compiler docker images - fix test cross compiler detection for some targets - don't try and link ebf to user targets - add L2 tracking to cache plugin - exit cleanly on C-a x - clean up debug output in check-tcg - switch to thread on break in gdbstub - update openbsd VM to 7.0 # gpg: Signature made Thu 04 Nov 2021 08:14:35 AM EDT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] * remotes/stsquad/tags/pull-for-6.2-041121-2: tests/vm/openbsd: Update to release 7.0 tests/tcg: remove debug polluting make output gdbstub: Switch to the thread receiving a signal tests/tcg: remove duplicate EXTRA_RUNS plugins: try and make plugin_insn_append more ergonomic tests/plugins: extend the insn plugin to track opcode sizes chardev: don't exit() straight away on C-a x docs/tcg-plugins: add L2 arguments to cache docs plugins/cache: make L2 emulation optional through args plugins/cache: split command line arguments into name and value plugins/cache: implement unified L2 cache emulation plugins/cache: freed heap-allocated mutexes ebpf: really include it only in system emulators tests/tcg: enable debian-nios2-cross for test building tests/docker: split PARTIAL into PARTIAL and VIRTUAL images tests/tcg: Fix some targets default cross compiler path tests/tcg: Enable container_cross_cc for microblaze tests/docker: Add debian-microblaze-cross image tests/docker: Add debian-nios2-cross image Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-04tests/tcg: remove debug polluting make outputAlex Bennée
Fixes: 5343a837cd ("tests/tcg: move some multiarch files and make conditional") Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211026173914.79377-1-alex.bennee@linaro.org>
2021-11-04gdbstub: Switch to the thread receiving a signalPavel Labath
Respond with Txxthread:yyyy; instead of a plain Sxx to indicate which thread received the signal. Otherwise, the debugger will associate it with the main one. Also automatically select this thread, as that is what gdb expects. Signed-off-by: Pavel Labath <pavel@labath.sk> Message-Id: <20211019174953.36560-1-pavel@labath.sk> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211026102234.3961636-29-alex.bennee@linaro.org>
2021-11-04tests/tcg: remove duplicate EXTRA_RUNSAlex Bennée
We set it bellow outside the #if leg. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211026102234.3961636-28-alex.bennee@linaro.org>
2021-11-04tests/tcg: enable debian-nios2-cross for test buildingAlex Bennée
Now we have a nios2 test image we can start using it to build tests. However signal handling in nios2 is still broken so we disable the signals and linux-test tests that trigger the bug. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211026102234.3961636-12-alex.bennee@linaro.org>
2021-11-04tests/tcg: Fix some targets default cross compiler pathPhilippe Mathieu-Daudé
We do not want a shell command substitution, but a parameter substitution (with assignment). Replace $() -> ${}, otherwise the expanded command return an empty string and the $cross_cc variable is not set. Fixes: 634ef789f8e ("tests/tcg: add more default compilers to configure.sh") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [AJB: disable sh4 linux-test] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20211023164329.328137-1-f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211026102234.3961636-9-alex.bennee@linaro.org>
2021-11-04tests/tcg: Enable container_cross_cc for microblazeRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20211014224435.2539547-8-richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211026102234.3961636-8-alex.bennee@linaro.org>
2021-11-03Hexagon HVX (tests/tcg/hexagon) histogram testTaylor Simpson
Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03Hexagon HVX (tests/tcg/hexagon) scatter_gather testTaylor Simpson
Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03Hexagon HVX (tests/tcg/hexagon) hvx_misc testTaylor Simpson
Tests for packet semantics vector loads (aligned and unaligned) vector stores (aligned and unaligned) vector masked stores vector new value store maximum HVX temps in a packet vector operations Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03Hexagon HVX (tests/tcg/hexagon) vector_add_int testTaylor Simpson
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-10-28Hexagon (target/hexagon) put writes to USR into temp until commitTaylor Simpson
Change SET_USR_FIELD to write to hex_new_value[HEX_REG_USR] instead of hex_gpr[HEX_REG_USR]. Then, we need code to mark the instructions that can set implicitly set USR - Macros added to hex_common.py - A_FPOP added in translate.c Test case added in tests/tcg/hexagon/overflow.c Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-10-21linux-user/ppc: Fix XER access in save/restore_user_regsMatheus Ferst
We should use cpu_read_xer/cpu_write_xer to save/restore the complete register since some of its bits are in other fields of CPUPPCState. A test is added to prevent future regressions. Fixes: da91a00f191f ("target-ppc: Split out SO, OV, CA fields from XER") Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20211014223234.127012-2-matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-10-13tests: tcg: Fix PVH test with binutils 2.36+Cole Robinson
binutils started adding a .note.gnu.property ELF section which makes the PVH test fail: TEST hello on x86_64 qemu-system-x86_64: Error loading uncompressed kernel without PVH ELF Note Discard .note.gnu* while keeping the PVH .note bits intact. This also strips the build-id note, so drop the related comment. Signed-off-by: Cole Robinson <crobinso@redhat.com> Message-Id: <5ab2a54c262c61f64c22dbb49ade3e2db8a740bb.1633708346.git.crobinso@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-10-12tests/tcg: move some multiarch files and make conditionalAlex Bennée
We had some messy code to filter out stuff we can't build. Lets junk that and simplify the logic by pushing some stuff into subdirs. In particular we move: float_helpers into libs - not a standalone test linux-test into linux - so we only build on Linux hosts This allows for at least some of the tests to be nominally usable by *BSD user builds. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Cc: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Message-Id: <20210917162332.3511179-4-alex.bennee@linaro.org>
2021-10-12tests/tcg/sha1: remove endian includeAlex Bennée
This doesn't exist in BSD world and doesn't seem to be needed by either. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Message-Id: <20210917162332.3511179-3-alex.bennee@linaro.org>
2021-10-06Hexagon (target/hexagon) probe the stores in a packet at start of commitTaylor Simpson
When a packet has 2 stores, either both commit or neither commit. At the beginning of gen_commit_packet, we check for multiple stores. If there are multiple stores, call a helper that will probe each of them before proceeding with the commit. Note that we don't call the probe helper for packets with only one store. Therefore, we call process_store_log before anything else involved in committing the packet. We also fix a typo in the comment in process_store_log. Test case added in tests/tcg/hexagon/hex_sigsegv.c Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <1633036599-7637-1-git-send-email-tsimpson@quicinc.com>
2021-10-01tests/tcg/multiarch: Re-enable signals test for most guestsRichard Henderson
With signal trampolines safely off the stack for all guests besides hppa, we can re-enable this test. It does show up a problem with sh4 (unrelated?), so leave that test disabled for now. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210929130553.121567-27-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-09-06tests/tcg/s390x: Test SIGILL and SIGSEGV handlingIlya Leoshkevich
Verify that s390x-specific uc_mcontext.psw.addr is reported correctly and that signal handling interacts properly with debugging. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: David Hildenbrand <david@redhat.com> Message-Id: <20210804225146.154513-1-iii@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-09-02tests/plugins/insn: made arg inline not positional and parse it as boolMahmoud Mandour
Made argument "inline" not positional, this has two benefits. First is that we adhere to how QEMU passes args generally, by taking the last value of an argument and drop the others. And the second is that this sets up a framework for potentially adding new args easily. Signed-off-by: Mahmoud Mandour <ma.mandourr@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210730135817.17816-11-ma.mandourr@gmail.com> [AJB: fix check-tcg tests calling arg=inline] Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2021-09-01tests/tcg/riscv64: Add test for divisionRichard Henderson
Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210823195529.560295-3-richard.henderson@linaro.org Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-08-26tests/tcg/multiarch/linux-test: Zero-initialize sockaddr structsPeter Maydell
Zero-initialize sockaddr_in and sockaddr_un structs that we're about to fill in and pass to bind() or connect(), to ensure we don't leave possible implementation-defined extension fields as uninitialized garbage. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 20210813150506.7768-5-peter.maydell@linaro.org
2021-08-03tests/tcg: Test that compare-and-trap raises SIGFPEJonathan Albrecht
Signed-off-by: Jonathan Albrecht <jonathan.albrecht@linux.vnet.ibm.com> Message-Id: <20210709160459.4962-3-jonathan.albrecht@linux.vnet.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-07-23tests/tcg/configure.sh: add handling for assembler only buildsAlex Bennée
Up until this point we only handled local compilers or assumed we had everything in the container. This falls down when we are building QEMU inside the container. This special handling only affects tricore for now but I put it in a case just in case we add any other "special" targets. Setting CROSS_CC_GUEST is a bit of a hack just to ensure the test runs as we gate on a detected compiler even though the Makefile won't actually use it. It also means we display something sane in the configure output. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210720232703.10650-27-alex.bennee@linaro.org>
2021-07-14tests/tcg: make test-mmap a little less aggressiveAlex Bennée
The check_aligned_anonymous_unfixed_mmaps and check_aligned_anonymous_unfixed_colliding_mmaps do a lot of mmap's and copying of data. This is especially unfriendly to targets like hexagon which have quite large pages and need to do sanity checks on each memory access. While we are at it clean-up the white space and style issues from the legacy code. As we no longer do quite so much needless memory access we can also remove the hexagon timeout hack. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20210709143005.1554-27-alex.bennee@linaro.org>
2021-07-14tests/tcg: also disable the signals test for pluginsAlex Bennée
This will be more important when plugins is enabled by default. Fixes: eba61056e4 ("tests/tcg: generalise the disabling of the signals test") Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210709143005.1554-6-alex.bennee@linaro.org>
2021-07-08tests/tcg: generalise the disabling of the signals testAlex Bennée
It turns out you push down in one place and failures pop-up elsewhere. Especially on CI. Disable for now for all targets. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-06-29Hexagon (target/hexagon) fix l2fetch instructionsTaylor Simpson
Y4_l2fetch == l2fetch(Rs32, Rt32) Y5_l2fetch == l2fetch(Rs32, Rtt32) The semantics for these instructions are present, but the encodings are missing. Note that these are treated as nops in qemu, so we add overrides. Test case added to tests/tcg/hexagon/misc.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1622589584-22571-3-git-send-email-tsimpson@quicinc.com>
2021-06-29Hexagon (target/hexagon) fix bug in fLSBNEW*Taylor Simpson
Change fLSBNEW/fLSBNEW0/fLSBNEW1 from copy to "x & 1" Remove gen_logical_not function Clean up fLSBNEWNOT to use andi-1 followed by xori-1 Test cases added to tests/tcg/hexagon/misc.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1622589584-22571-2-git-send-email-tsimpson@quicinc.com>
2021-06-25tests/tcg: skip the signals test for hppa/s390x for nowAlex Bennée
There are fixes currently in flight but as this is getting in the way of a green CI we might as well skip for now. For reference the fix series are: linux-user: Move signal trampolines to new page 20210616011209.1446045-1-richard.henderson@linaro.org and linux-user: Load a vdso for x86_64 and hppa 20210619034329.532318-1-richard.henderson@linaro.org Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Cornelia Huck <cohuck@redhat.com> Cc: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210623102749.25686-7-alex.bennee@linaro.org>
2021-06-24Merge remote-tracking branch ↵Peter Maydell
'remotes/thuth-gitlab/tags/pull-request-2021-06-21' into staging * Documentation updates * Remove leading underscores from header guards * Display hexadecimal value with '0x' prefix # gpg: Signature made Mon 21 Jun 2021 11:33:53 BST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/thuth-gitlab/tags/pull-request-2021-06-21: MAINTAINERS: Add qtest/arm-cpu-features.c to ARM TCG CPUs section fuzz: Display hexadecimal value with '0x' prefix Remove leading underscores from QEMU defines Update documentation to refer to new location for issues docs/tools/virtiofsd: Fix bad rst syntax docs/tools/virtiofsd.rst: Do not hard-code the QEMU binary name docs/interop/live-block-operations: Do not hard-code the QEMU binary name Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-06-22Merge remote-tracking branch ↵Peter Maydell
'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging Linux-user pull request 20210621 # gpg: Signature made Mon 21 Jun 2021 12:03:53 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-6.1-pull-request: linux-user: Use public sigev_notify_thread_id member if available linux-user: Fix incorrect use of feature-test-macros linux-user: Check for ieee128 fpbits in PPC64 HWCAP2 feature list tests/tcg/linux-test: Check that sigaction can query SIGKILL/SIGSTOP linux-user: Let sigaction query SIGKILL/SIGSTOP linux-user: Implement pivot_root linux-user/trace-events: fix minor typo in format string linux-user: Disable static assert involving __SIGRTMAX if it is missing linux-user: Set CF_PARALLEL when mapping shared memory Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-06-21Remove leading underscores from QEMU definesAhmed Abouzied
Leading underscores followed by a capital letter or underscore are reserved by the C standard. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/369 Signed-off-by: Ahmed Abouzied <email@aabouzied.com> Message-Id: <20210605174938.13782-1-email@aabouzied.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-06-20tests/tcg/linux-test: Check that sigaction can query SIGKILL/SIGSTOPIlya Leoshkevich
Verify that querying is allowed, but making changes isn't. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210601145600.3131040-3-iii@linux.ibm.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-06-19tests/tcg: Increase timeout for TCIRichard Henderson
The longest test at the moment seems to be a (slower) aarch64 host, for which test-mmap takes 64 seconds. Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-16target/arm: Fix mte page crossing testRichard Henderson
The test was off-by-one, because tag_last points to the last byte of the tag to check, thus tag_last - prev_page will equal TARGET_PAGE_SIZE when we use the first byte of the next page. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/403 Reported-by: Peter Collingbourne <pcc@google.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210612195707.840217-1-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-06-07tests/tcg/configure.sh: tweak quoting of target_compilerAlex Bennée
If you configure the host compiler with a multi-command stanza like: --cc="ccache gcc" then the configure.sh machinery falls over with confusion. Work around this by ensuring we correctly quote so where we need a complete evaluation we get it. Of course the has() check needs single variable so we need to unquote that. This does mean it essentially checks that just the ccache command exits but if we got past that step we still check the compiler actually does something. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Cc: Thomas Huth <thuth@redhat.com> Message-Id: <20210527160319.19834-4-alex.bennee@linaro.org>
2021-06-07tests/tcg: add a multiarch signals test to stress test signal deliveryAlex Bennée
This adds a simple signal test that combines the POSIX timer_create with signal delivery across multiple threads. The aim is to provide a bit more of a stress test to flush out signal handling issues for easily than the occasional random crash we sometimes see in linux-test or threadcount. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210527160319.19834-2-alex.bennee@linaro.org>
2021-05-20target/xtensa: clean up unaligned accessMax Filippov
Xtensa cores may or may not have hardware support for unaligned memory access. Remove TARGET_ALIGNED_ONLY=y from all xtensa configurations and pass MO_ALIGN in memory access flags for all operations that would raise an exception. Simplify use of gen_load_store_alignment by passing access size and alignment requirements in single parameter. Drop condition from xtensa_cpu_do_unaligned_access and replace it with assertion. Add a test. Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2021-05-20tests/tcg/x86_64: add vsyscall smoke testIlya Leoshkevich
Having a small test will prevent trivial regressions in the future. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20210519045738.1335210-3-iii@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2021-05-20Merge remote-tracking branch ↵Peter Maydell
'remotes/stsquad/tags/pull-testing-and-plugin-updates-180521-2' into staging testing and plugin updates: - various fixes for binfmt_misc docker images - add hexagon check-tcg support docker image - add tricore check-tcg support - refactor ppc docker images - add missing ppc64le tests - don't use host_cc for test fallback - check-tcg configure.sh tweaks for cross compile/clang - fix some memory leaks in plugins # gpg: Signature made Tue 18 May 2021 09:37:21 BST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-and-plugin-updates-180521-2: (29 commits) configure: use cc, not host_cc to set cross_cc for build arch tests/tcg: don't allow clang as a cross compiler tests/tcg: fix missing return tests/tcg/ppc64le: tests for brh/brw/brd tests/docker: gcc-10 based images for ppc64{,le} tests tests/tcg/tricore: Add muls test tests/tcg/tricore: Add msub test tests/tcg/tricore: Add madd test tests/tcg/tricore: Add ftoi test tests/tcg/tricore: Add fmul test tests/tcg/tricore: Add fadd test tests/tcg/tricore: Add dvstep test tests/tcg/tricore: Add clz test tests/tcg/tricore: Add bmerge test tests/tcg/tricore: Add macros to create tests and first test 'abs' configure: Emit HOST_CC to config-host.mak tests/tcg/tricore: Add build infrastructure hw/tricore: Add testdevice for tests in tests/tcg/ tests/tcg: Run timeout cmds using --foreground tests/tcg: Add docker_as and docker_ld cmds ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.2.3 (git 2.26.2) at 2025-01-15 12:52:54 +0000