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2022-07-20Merge tag 'pull-request-2022-07-20' of https://gitlab.com/thuth/qemu into ↵Peter Maydell
staging * Fixes for s390x floating point vector instructions # gpg: Signature made Wed 20 Jul 2022 08:14:50 BST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2022-07-20' of https://gitlab.com/thuth/qemu: tests/tcg/s390x: test signed vfmin/vfmax target/s390x: fix NaN propagation rules target/s390x: fix handling of zeroes in vfmin/vfmax Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # fpu/softfloat-specialize.c.inc
2022-07-20Merge tag 'pull-hex-20220719-1' of https://github.com/quic/qemu into stagingPeter Maydell
Recall that the semantics of a Hexagon mem_noshuf packet are that the store effectively happens before the load. There are two bug fixes in this series. # gpg: Signature made Tue 19 Jul 2022 22:25:19 BST # gpg: using RSA key 3635C788CE62B91FD4C59AB47B0244FB12DE4422 # gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 3635 C788 CE62 B91F D4C5 9AB4 7B02 44FB 12DE 4422 * tag 'pull-hex-20220719-1' of https://github.com/quic/qemu: Hexagon (target/hexagon) fix bug in mem_noshuf load exception Hexagon (target/hexagon) fix store w/mem_noshuf & predicated load Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-07-19Hexagon (target/hexagon) fix bug in mem_noshuf load exceptionTaylor Simpson
The semantics of a mem_noshuf packet are that the store effectively happens before the load. However, in cases where the load raises an exception, we cannot simply execute the store first. This change adds a probe to check that the load will not raise an exception before executing the store. If the load is predicated, this requires special handling. We check the condition before performing the probe. Since, we need the EA to perform the check, we move the GET_EA portion inside CHECK_NOSHUF_PRED. Test case added in tests/tcg/hexagon/mem_noshuf_exception.c Suggested-by: Alessandro Di Federico <ale@rev.ng> Suggested-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220707210546.15985-3-tsimpson@quicinc.com>
2022-07-19Hexagon (target/hexagon) fix store w/mem_noshuf & predicated loadTaylor Simpson
Call the CHECK_NOSHUF macro multiple times: once in the fGEN_TCG_PRED_LOAD() and again in fLOAD(). Before this commit, a packet with a store and a predicated load with mem_noshuf that gets encoded like this: { P0 = cmp.eq(R17,#0x0) memw(R18+#0x0) = R2 if (!P0.new) R3 = memw(R17+#0x4) } ... would end up generating a branch over both the load and the store like so: ... brcond_i32 loc17,$0x0,eq,$L1 mov_i32 loc18,store_addr_1 qemu_st_i32 store_val32_1,store_addr_1,leul,0 qemu_ld_i32 loc16,loc7,leul,0 set_label $L1 ... Test cases added to tests/tcg/hexagon/mem_noshuf.c Co-authored-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Brian Cain <bcain@quicinc.com> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220707210546.15985-2-tsimpson@quicinc.com>
2022-07-19tests/tcg/loongarch64: Add pcadd related instructions testSong Gao
This includes: - PCADDI - PCADDU12I - PCADDU18I - PCALAU12I Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220716085426.3098060-9-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-19tests/tcg/loongarch64: Add fp comparison instructions testSong Gao
Choose some instructions to test: - FCMP.cond.S - cond: ceq clt cle cne seq slt sle sne Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220716085426.3098060-8-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-19tests/tcg/loongarch64: Add fclass testSong Gao
This includes: - FCLASS.{S/D} Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220716085426.3098060-7-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-19tests/tcg/loongarch64: Add div and mod related instructions testSong Gao
This includes: - DIV.{W[U]/D[U]} - MOD.{W[U]/D[U]} Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220716085426.3098060-6-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-19tests/tcg/loongarch64: Add clo related instructions testSong Gao
This includes: - CL{O/Z}.{W/D} - CT{O/Z}.{W/D} Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220716085426.3098060-5-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-19tests/tcg/loongarch64: Add float reference filesPhilippe Mathieu-Daudé
Generated on Loongson-3A5000 (CPU revision 0x0014c011). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220104132022.2146857-1-f4bug@amsat.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220716085426.3098060-2-gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-19tests/tcg/s390x: test signed vfmin/vfmaxIlya Leoshkevich
Add a test to prevent regressions. Try all floating point value sizes and all combinations of floating point value classes. Verify the results against PoP tables, which are represented as close to the original as possible - this produces a lot of checkpatch complaints, but it seems to be justified in this case. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220713182612.3780050-4-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-12Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingPeter Maydell
* fuzzing fixes (Alexander) * fix cross compilation CFLAGS and compiler choice * do not specify -bios option for tests/vm * miscellaneous fixes * preparation for pre-install tree in the build directory (Akihiko) # gpg: Signature made Tue 12 Jul 2022 13:47:19 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: meson: place default firmware path under .../share qga: Relocate a path emitted in the help text build: Do not depend on pc-bios for config-host.mak accel: kvm: Fix memory leak in find_stats_descriptors audio/dbus: fix building fuzz: only use generic-fuzz targets on oss-fuzz build: improve -fsanitize-coverage-allowlist check build: try both native and cross compilers configure: pass whole target name to probe_target_compiler tests/tcg: compile system emulation tests as freestanding configure: write EXTRA_CFLAGS for all sub-Makefiles configure: allow more host/target combos to use the host compiler configure, pc-bios/vof: pass cross CFLAGS correctly configure, pc-bios/s390-ccw: pass cross CFLAGS correctly configure, pc-bios/optionrom: pass cross CFLAGS correctly pc-bios/optionrom: use -m16 unconditionally scsi/lsi53c895a: fix use-after-free in lsi_do_msgout (CVE-2022-0216) tests/vm: do not specify -bios option Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # pc-bios/s390-ccw/netboot.mak
2022-07-06tests/tcg/ppc64: Add mffsce testVíctor Colombo
Add mffsce test to check both the return value and the new fpscr stored in the cpu. Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br> Reviewed-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20220629162904.105060-8-victor.colombo@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-07-06tests/tcg: compile system emulation tests as freestandingPaolo Bonzini
System emulation tests do not run in a hosted environment, since they do not link with libc. They should only use freestanding headers (float.h, limits.h, stdarg.h, stddef.h, stdbool.h, stdint.h, stdalign.h, stdnoreturn.h) and should be compiled with -ffreestanding in order to use the compiler implementation of those headers rather than the one in libc. Some tests are using inttypes.h instead of stdint.h, so fix that. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-03target/riscv: Set env->bins in gen_exception_illegalRichard Henderson
While we set env->bins when unwinding for ILLEGAL_INST, from e.g. csrrw, we weren't setting it for immediately illegal instructions. Add a testcase for mtval via both exception paths. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1060 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220604231004.49990-2-richard.henderson@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-06-14tests/tcg/i386: Use explicit suffix on fist insnsRichard Henderson
Fixes a number of assembler warnings of the form: test-i386.c: Assembler messages: test-i386.c:869: Warning: no instruction mnemonic suffix given and no register operands; using default for `fist' Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220527171143.168276-1-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220613171258.1905715-3-alex.bennee@linaro.org>
2022-06-14test/tcg/arm: Use -mfloat-abi=soft for test-armv6m-undefRichard Henderson
GCC11 from crossbuild-essential-armhf from ubuntu 22.04 errors: cc1: error: ‘-mfloat-abi=hard’: selected architecture lacks an FPU Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220604032713.174976-1-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220613171258.1905715-2-alex.bennee@linaro.org>
2022-06-08Fix 'writeable' typosPeter Maydell
We have about 30 instances of the typo/variant spelling 'writeable', and over 500 of the more common 'writable'. Standardize on the latter. Change produced with: sed -i -e 's/\([Ww][Rr][Ii][Tt]\)[Ee]\([Aa][Bb][Ll][Ee]\)/\1\2/g' $(git grep -il writeable) and then hand-undoing the instance in linux-headers/linux/kvm.h. Most of these changes are in comments or documentation; the exceptions are: * a local variable in accel/hvf/hvf-accel-ops.c * a local variable in accel/kvm/kvm-all.c * the PMCR_WRITABLE_MASK macro in target/arm/internals.h * the EPT_VIOLATION_GPA_WRITABLE macro in target/i386/hvf/vmcs.h (which is never used anywhere) * the AR_TYPE_WRITABLE_MASK macro in target/i386/hvf/vmx.h (which is never used anywhere) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Stefan Weil <sw@weilnetz.de> Message-id: 20220505095015.2714666-1-peter.maydell@linaro.org
2022-06-06tests/tcg/loongarch64: Add hello/memory test in loongarch64 systemXiaojuan Yang
- We write a very minimal softmmu harness. - This is a very simple smoke test with no need to run a full Linux/kernel. - The Makefile.softmmu-target record the rule to run. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-43-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-03tests/tcg: Test overflow conditionsGautam Agrawal
Add a test to check for overflow conditions in s390x. This patch is based on the following patches : * https://git.qemu.org/?p=qemu.git;a=commitdiff;h=5a2e67a691501 * https://git.qemu.org/?p=qemu.git;a=commitdiff;h=fc6e0d0f2db51 Signed-off-by: Gautam Agrawal <gautamnagrawal@gmail.com> Message-Id: <20220531183524.40948-1-gautamnagrawal@gmail.com> [thuth: Move overflow.c to tests/tcg/multiarch/ to make it generic] Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-06-02Merge tag 'm68k-for-7.1-pull-request' of https://github.com/vivier/qemu-m68k ↵Richard Henderson
into staging m68k pull request 20220602 - Fixes and cleanup - Implement TRAP opcodes - Enable halt on 68060 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmKYpeQSHGxhdXJlbnRA # dml2aWVyLmV1AAoJEPMMOL0/L748U+AP/i6EYidZmelIEqOwZTwwzxreF5bTZmAP # v0Hxt3Tef3PWJpLnoCXCsd4othCO3PgHcwtrLff+bkWRl0Wt5CYcq+tTu2im7fIN # zM7RSO00Pt/va7Ss7Ej8d5P5l7uuFqcBFytnitbsNrvHNK4cQ9PVmOkPnJZe0lYt # vA3pUk7giE1KV+/s78Z4VD5CbvwpTRQpDCPDvba7oIP2E9mOELajKtYGh7gvPthx # hrG2L5Ou4rYWxJkpZ0mNyYvoPuGRmzgPImdaDMTPLjEYNJMnnqGCRm+ANtzNk+jy # d/fE/xJ41xvPAt4Q29yCp0vITuRF468M/elp5hQr/rHc6xtitLCi57FhduY9PuL/ # zCMXytgFtnU1C9XhDI/FtQhQxpvEKkZmEJRrAnsuHQKLrHlGoofjBU3whHqfx1zG # qw/cdYqx/RUKKxvmoTbk76doaqfVQvBIx2nB6CsHF3pqOpQETK5TYeId49GCkwgR # 4DmBPL1RZZpkYxi1KEKprcJWMj1l29UTa2dJ+kt9T2YACRm7MYQurP8OCGoHFIX4 # MOr3vdxaqSRU+mE2lWLZWupkZyzFrG/khHSB7A9htTomgbfZLfc0YkHX5kOkHQNq # k4ymLpf16F94aau568HVQO8UZV+1FedtRwJL2EWVqkzKri9rSCCeI8I27HVLjwLP # YzrHwsMVsjgl # =T1g0 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 02 Jun 2022 04:58:28 AM PDT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [undefined] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [undefined] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * tag 'm68k-for-7.1-pull-request' of https://github.com/vivier/qemu-m68k: target/m68k: Mark helper_raise_exception as noreturn linux-user/strace: Adjust get_thread_area for m68k linux-user/strace: Use is_error in print_syscall_err tests/tcg/m68k: Add trap.c target/m68k: Implement FTRAPcc target/m68k: Implement TRAPV target/m68k: Implement TPF in terms of TRAPcc target/m68k: Implement TRAPcc target/m68k: Fix stack frame for EXCP_ILLEGAL target/m68k: Fix address argument for EXCP_TRACE target/m68k: Fix pc, c flag, and address argument for EXCP_DIV0 target/m68k: Fix address argument for EXCP_CHK target/m68k: Remove retaddr in m68k_interrupt_all linux-user/m68k: Handle EXCP_TRAP1 through EXCP_TRAP15 target/m68k: Fix coding style in m68k_interrupt_all target/m68k: Switch over exception type in m68k_interrupt_all target/m68k: Raise the TRAPn exception with the correct pc target/m68k: Enable halt insn for 68060 target/m68k: Clear mach in m68k_cpu_disas_set_info Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-02tests/tcg/m68k: Add trap.cRichard Henderson
Test various trap instructions: chk, div, trap, trapv, trapcc, ftrapcc, and the signals and addresses that we expect from them. Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220602013401.303699-15-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-06-01tests/tcg: merge configure.sh back into main configure scriptPaolo Bonzini
tests/tcg/configure.sh has a complicated story. In the beginning its code ran as part of the creation of config-target.mak files, and that is where it placed the information on the target compiler. However, probing for the buildability of TCG tests required multiple inclusions of config-target.mak in the _main_ Makefile (not in Makefile.target, which took care of building the QEMU executables in the pre-Meson era), which polluted the namespace. Thus, it was moved to a separate directory. It created small config-*.mak files in $(BUILD_DIR)/tests/tcg. Those were also included multiple times, but at least they were small and manageable; this was also an important step in disentangling the TCG tests from Makefile.target. Since then, Meson has allowed the configure script to go on a diet. A few compilation tests survive (mostly for sanitizers) but these days it mostly takes care of command line parsing, looking for tools, and setting up the environment for Meson to do its stuff. It's time to extend configure with the capability to build for more than just one target: not just tests, but also firmware. As a first step, integrate all the logic to find cross compilers in the configure script, and move tests/tcg/configure.sh back there (though as a separate loop, not integrated in the one that generates target configurations for Meson). tests/tcg is actually very close to being buildable as a standalone project, so I actually expect the compiler tests to move back to tests/tcg, as a "configure" script of sorts which would run at Make time after the docker images are built. The GCC tree has a similar idea of doing only bare-bones tree-wide configuration and leaving the rest for Make time. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220517092616.1272238-8-pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220527153603.887929-19-alex.bennee@linaro.org>
2022-06-01tests/tcg: correct target CPU for sparc32Paolo Bonzini
We do not want v8plus for pure sparc32, as the difference with the V8 ABI are only meaningful on 64-bit CPUs suh as ultrasparc; supersparc is the best CPU to use for 32-bit. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220517092616.1272238-7-pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220527153603.887929-18-alex.bennee@linaro.org>
2022-05-23tests/tcg/s390x: Test unwinding from signal handlersIlya Leoshkevich
Add a small test to prevent regressions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20220503225157.1696774-3-iii@linux.ibm.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-05-06tests/tcg/xtensa: fix vectors and checks in timer testMax Filippov
Timer test assumes that timer 0 IRQ has level 1 and other timers have higher level IRQs. This assumption is not correct and the levels may be arbitrary. Fix that assumption by providing TIMER*_VECTOR macro and using it for vector selection and by making the check for the timer exception cause conditional. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06tests/tcg/xtensa: enable mmu tests for MMUv3Max Filippov
MMU test suite is disabled for cores that have spanning TLB way, i.e. for all MMUv3 cores. Instead of disabling it make testing region virtual addresses explicit and invalidate TLB mappings for entries that conflict with the test. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06tests/tcg/xtensa: enable autorefill phys_mem tests for MMUv3Max Filippov
Autorefill tests in the phys_mem test suite are disabled for cores that have spanning TLB way, i.e. for all MMUv3 cores. Instead of disabling it invalidate TLB mappings for entries that conflict with the test. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06tests/tcg/xtensa: remove dependency on the loop optionMax Filippov
xtensa core may not have the loop option, but still have timers. Don't use loop opcode in the timer test. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06tests/tcg/xtensa: fix watchpoint testMax Filippov
xtensa core may have only one set of DBREAKA/DBREAKC registers. Don't hardcode register numbers in the test as 0 and 1, use macros that only index valid DBREAK* registers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06tests/tcg/xtensa: restore vecbase SR after testMax Filippov
Writing garbage into the vecbase SR results in hang in the subsequent tests that expect to raise an exception. Restore vecbase SR to its reset value after the test. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-06tests/tcg/xtensa: fix build for cores without windowed registersMax Filippov
Don't try to initialize windowbase/windowstart in crt.S if they don't exist. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-05target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-userRichard Henderson
This controls whether the PACI{A,B}SP instructions trap with BTYPE=3 (indirect branch from register other than x16/x17). The linux kernel sets this in bti_enable(). Resolves: https://gitlab.com/qemu-project/qemu/-/issues/998 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20220427042312.294300-1-richard.henderson@linaro.org [PMM: remove stray change to makefile comment] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-04tests/tcg/s390x: Use a different PCRel32 notation in branch-relative-long.cIlya Leoshkevich
Binutils >=2.37 and Clang do not accept (. - 0x100000000) PCRel32 constants. While this looks like a bug that needs fixing, use a different notation (-0x100000000) as a workaround. Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20220502164830.1622191-1-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-05-04tests/tcg/s390x: Tests for Vector Enhancements Facility 2David Miller
Signed-off-by: David Miller <dmiller423@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220428094708.84835-14-david@redhat.com> [thuth: Only add test if -march=z15 is supported. Fix constraints for Clang] Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-04-26tests/tcg/nios2: Add test-shadow-1Richard Henderson
Add a regression test for tcg indirect global lowering. This appeared with nios2, with cps != 0, so that we use indirection into the shadow register set. An indirect call verifies alignment of rA. The use of rA was live across the brcond leading to a tcg_debug_assert failure. Cc: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220421151735.31996-65-richard.henderson@linaro.org>
2022-04-26tests/tcg/nios2: Add semihosting multiarch testsRichard Henderson
Add runtime supporting the nios2-semi.c interface. Execute the hello and memory multiarch tests. Cc: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-64-richard.henderson@linaro.org>
2022-04-26tests/tcg/nios2: Re-enable linux-user testsRichard Henderson
Now that threads and signals have been fixed, re-enable tests. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-9-richard.henderson@linaro.org>
2022-04-20tests/tcg: add missing reference files for float_convsAlex Bennée
We might as well include a reference file for i386/x86_64. I was going to include s390x as well but it's broken hence I raised: https://gitlab.com/qemu-project/qemu/-/issues/979. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220419091020.3008144-24-alex.bennee@linaro.org>
2022-04-20tests/tcg: add float_convd testAlex Bennée
This is a simple transliteration of the float_convs test but this time working with doubles. I'm used it to test the handling of vector registers in gdbstub but wasn't able to find a non-ugly way to automate it. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220419091020.3008144-23-alex.bennee@linaro.org>
2022-04-20tests/tcg: remove duplicate sha512-sse caseAlex Bennée
We already generate the sha512-sse case in the i386 makefile which works for both i386 and x86_64. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Fixes: f8a4c6d728 ("tests/tcg: add vectorised sha512 versions") Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220419091020.3008144-22-alex.bennee@linaro.org>
2022-04-20tests/tcg: fix non-static buildPaolo Bonzini
If linking with -static fails at configure time, -static should not be used at build time either. Do not include BUILD_STATIC in $config_target_mak. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20220401141326.1244422-18-pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220419091020.3008144-21-alex.bennee@linaro.org>
2022-04-20tests/tcg: isolate from QEMU's config-host.makPaolo Bonzini
Do not include variables for the QEMU's own compiler, as they are not necessarily related to the cross compiler used for tests/tcg. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20220401141326.1244422-16-pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220419091020.3008144-19-alex.bennee@linaro.org>
2022-04-20tests/tcg: invoke Makefile.target directly from QEMU's makefilePaolo Bonzini
Build the "docker.py cc" invocation directly in tests/tcg/configure.sh, and remove the Makefile.qemu wrapper around Makefile.target. The config-*.mak files now include the actual variables used when building the tests, rather than the CROSS_* variables that Makefile.qemu used to "translate". This is a first step towards generalizing the cross-compilation infrastructure so that it can be used for firmware as well. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20220401141326.1244422-15-pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220419091020.3008144-18-alex.bennee@linaro.org>
2022-04-20tests/tcg: list test targets in Makefile.prereqsPaolo Bonzini
Omit the rules altogether for targets that do not have a compiler. Makefile.qemu now is only invoked if the tests are actually built/run. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20220401141326.1244422-14-pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220419091020.3008144-17-alex.bennee@linaro.org>
2022-04-20tests/tcg: prepare Makefile.prereqs at configure timePaolo Bonzini
List the dependencies of the build-tcg-tests-* and run-tcg-tests-* targets in a Makefile fragment, without going through Makefile.prereqs's "parsing" of config-*.mak. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20220401141326.1244422-13-pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220419091020.3008144-16-alex.bennee@linaro.org>
2022-04-20tests/tcg: remove CONFIG_USER_ONLY from config-target.makPaolo Bonzini
Just check the target name instead. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20220401141326.1244422-12-pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220419091020.3008144-15-alex.bennee@linaro.org>
2022-04-20tests/tcg: remove CONFIG_LINUX_USER from config-target.makPaolo Bonzini
Just check the target name instead. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220401141326.1244422-11-pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220419091020.3008144-14-alex.bennee@linaro.org>
2022-04-20tests/tcg: add compiler test variables when using containersPaolo Bonzini
Even for container-based cross compilation use $(CROSS_CC_HAS_*) variables. This makes the TCG test makefiles oblivious of whether the compiler is invoked through a container or not. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220401141326.1244422-10-pbonzini@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220419091020.3008144-13-alex.bennee@linaro.org>
2022-04-06Replace TARGET_WORDS_BIGENDIANMarc-André Lureau
Convert the TARGET_WORDS_BIGENDIAN macro, similarly to what was done with HOST_BIG_ENDIAN. The new TARGET_BIG_ENDIAN macro is either 0 or 1, and thus should always be defined to prevent misuse. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Suggested-by: Halil Pasic <pasic@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220323155743.1585078-8-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
generated by cgit v1.2.3 (git 2.26.2) at 2025-01-28 00:11:06 +0000