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2020-06-10target/i386: fix fscale handling of infinite exponentsJoseph Myers
The fscale implementation passes infinite exponents through to generic code that rounds the exponent to a 32-bit integer before using floatx80_scalbn. In round-to-nearest mode, and ignoring exceptions, this works in many cases. But it fails to handle the special cases of scaling 0 by a +Inf exponent or an infinity by a -Inf exponent, which should produce a NaN, and because it produces an inexact result for finite nonzero numbers being scaled, the result is sometimes incorrect in other rounding modes. Add appropriate handling of infinite exponents to produce a NaN or an appropriately signed exact zero or infinity as a result. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.21.2005070045010.18350@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-06-10target/i386: fix fscale handling of invalid exponent encodingsJoseph Myers
The fscale implementation does not check for invalid encodings in the exponent operand, thus treating them like INT_MIN (the value returned for invalid encodings by floatx80_to_int32_round_to_zero). Fix it to treat them similarly to signaling NaN exponents, thus generating a quiet NaN result. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.21.2005070044190.18350@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-06-10target/i386: fix fscale handling of signaling NaNJoseph Myers
The implementation of the fscale instruction returns a NaN exponent unchanged. Fix it to return a quiet NaN when the provided exponent is a signaling NaN. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.21.2005070043330.18350@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-06-10target/i386: implement special cases for fxtractJoseph Myers
The implementation of the fxtract instruction treats all nonzero operands as normal numbers, so yielding incorrect results for invalid formats, infinities, NaNs and subnormal and pseudo-denormal operands. Implement appropriate handling of all those cases. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <alpine.DEB.2.21.2005070042360.18350@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-06-08tests/tcg: add simple commpage test caseAlex Bennée
The COMMPAGE are a number of kernel provided user-space routines for 32 bit ARM systems. Add a basic series of smoke tests to ensure it is working as it should. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200605154929.26910-14-alex.bennee@linaro.org>
2020-05-27tests/tcg: add new threadcount testAlex Bennée
Based on the original testcase by Nikolay Igotti. Message-ID: <CAEme+7GLKg_dNsHizzTKDymX9HyD+Ph2iZ=WKhOw2XG+zhViXg@mail.gmail.com> Signed-off-by: Nikolay Igotti <igotti@gmail.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200520140541.30256-15-alex.bennee@linaro.org>
2020-05-27tests/docker: use a gcc-10 based image for arm64 testsAlex Bennée
As we enable newer features that we want to test on arm64 targets we need newer compilers. Split off a new debian-arm64-test-cross image which we can use to build these new tests. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200520140541.30256-11-alex.bennee@linaro.org>
2020-05-27tests/tcg: better detect confused gdb which can't connectAlex Bennée
While we may gamely give the right information it can still confuse the wide range of GDBs out there. For example ppc64abi32-linux-user reports: warning: Selected architecture powerpc:common is not compatible with reported target architecture powerpc:common64 warning: Architecture rejected target-supplied description but still connects. Add a test for a 0 pc and exit early if that is the case. This may actually be a bug we need to fix? Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200520140541.30256-8-alex.bennee@linaro.org>
2020-05-27tests/tcg: fix invocation of the memory record/replay testsAlex Bennée
I'm not sure when this broke but we should use EXTRA_RUNS for "virtual" tests which are not generated from the binary names. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200520140541.30256-5-alex.bennee@linaro.org>
2020-05-15softfloat: fix floatx80 pseudo-denormal round to integerJoseph Myers
The softfloat function floatx80_round_to_int incorrectly handles the case of a pseudo-denormal where only the high bit of the significand is set, ignoring that bit (treating the number as an exact zero) rather than treating the number as an alternative representation of +/- 2^-16382 (which may round to +/- 1 depending on the rounding mode) as hardware does. Fix this check (simplifying the code in the process). Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.21.2005042339420.22972@digraph.polyomino.org.uk> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-05-15softfloat: fix floatx80 pseudo-denormal comparisonsJoseph Myers
The softfloat floatx80 comparisons fail to allow for pseudo-denormals, which should compare equal to corresponding values with biased exponent 1 rather than 0. Add an adjustment for that case when comparing numbers with the same sign. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.21.2005042338470.22972@digraph.polyomino.org.uk> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-05-15softfloat: fix floatx80 pseudo-denormal addition / subtractionJoseph Myers
The softfloat function addFloatx80Sigs, used for addition of values with the same sign and subtraction of values with opposite sign, fails to handle the case where the two values both have biased exponent zero and there is a carry resulting from adding the significands, which can occur if one or both values are pseudo-denormals (biased exponent zero, explicit integer bit 1). Add a check for that case, so making the results match those seen on x86 hardware for pseudo-denormals. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.21.2005042337570.22972@digraph.polyomino.org.uk> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-05-15softfloat: silence sNaN for conversions to/from floatx80Joseph Myers
Conversions between IEEE floating-point formats should convert signaling NaNs to quiet NaNs. Most of those in QEMU's softfloat code do so, but those for floatx80 fail to. Fix those conversions to silence signaling NaNs as well. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.21.2005042336170.22972@digraph.polyomino.org.uk> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-05-06tests/tcg: add a multiarch linux-user gdb testAlex Bennée
When the gdbstub code was converted to the new API we missed a few snafus in the various guests. Add a simple gdb test script which can be used on all our linux-user guests to check for obvious failures. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200430190122.4592-9-alex.bennee@linaro.org>
2020-05-06tests/tcg: drop inferior.was_attached() testAlex Bennée
This test seems flaky and reports attachment even when we failed to negotiate the architecture. However the fetching of the guest architecture will fail tripping up the gdb AttributeError which will trigger our early no error status exit from the test Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200430190122.4592-5-alex.bennee@linaro.org>
2020-05-06tests/tcg: better trap gdb failuresAlex Bennée
It seems older and non-multiarach aware GDBs might not fail gracefully when faced with something they don't know. For example when faced with a target XML for s390x the Ubuntu 18.04 gdb will generate an internal fault and prompt for a core dump. Work around this by invoking GDB in a more batch orientated way and then trying to filter out between test failures and gdb failures. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200430190122.4592-4-alex.bennee@linaro.org>
2020-04-07tests/tcg: remove extraneous pasting macrosAlex Bennée
We are not using them and they just get in the way. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200403191150.863-4-alex.bennee@linaro.org>
2020-03-17tests/tcg/aarch64: add test-sve-ioctl guest-debug testAlex Bennée
This test exercises the gdbstub while runing the sve-iotcl test. I haven't plubmed it into make system as we need a way of verifying if gdb has the right support for SVE. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200316172155.971-26-alex.bennee@linaro.org>
2020-03-17tests/tcg/aarch64: add SVE iotcl testAlex Bennée
This is a fairly bare-bones test of setting the various vector sizes for SVE which will only fail if the PR_SVE_SET_VL can't reduce the user-space vector length by powers of 2. However we will also be able to use it in a future test which exercises the GDB stub. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200316172155.971-25-alex.bennee@linaro.org>
2020-03-17tests/tcg/aarch64: add a gdbstub testcase for SVE registersAlex Bennée
A very simple test case which sets and reads SVE registers while running a test case. We don't really need to compile a SVE binary for this case but we will later so keep it simple for now. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200316172155.971-24-alex.bennee@linaro.org>
2020-03-17tests/tcg/aarch64: userspace system register testAlex Bennée
This tests a bunch of registers that the kernel allows userspace to read including the CPUID registers. We need a SVE aware compiler as we are testing the id_aa64zfr0_el1 register in the set. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200316172155.971-21-alex.bennee@linaro.org>
2020-03-05tests/tcg/aarch64: Add newline in pauth-1 printfRichard Henderson
Make the output just a bit prettier when running by hand. Cc: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200229012811.24129-13-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-02-25tests/tcg: take into account expected clashes pauth-4Alex Bennée
Pointer authentication isn't perfect so measure the percentage of failed checks. As we want to vary the pointer we work through a bunch of different addresses. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Robert Foley <robert.foley@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200225124710.14152-20-alex.bennee@linaro.org>
2020-02-25tests/tcg: fix typo in configure.sh test for v8.3Alex Bennée
Although most people use the docker images this can trip up on developer systems with actual valid cross-compilers! Fixes: bb516dfc5b3 Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200225124710.14152-19-alex.bennee@linaro.org>
2020-02-25tests/tcg: give debug builds a little bit longerAlex Bennée
When combined with heavy plugins we occasionally hit the timeouts. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200225124710.14152-17-alex.bennee@linaro.org>
2020-02-25tests/tcg: include a skip runner for pauth3 with pluginsAlex Bennée
If we have plugins enabled we still need to have built the test to be able to run it. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Robert Foley <robert.foley@linaro.org> Message-Id: <20200225124710.14152-2-alex.bennee@linaro.org>
2020-02-04tests/tcg: gate pauth-% tests on having compiler supportAlex Bennée
Otherwise we end up failing to build our tests on CI which may have older compilers that the user expects. We can get rid of this once we can fallback to multiarch containers. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200203090932.19147-14-alex.bennee@linaro.org>
2020-02-04tests/tcg: add a configure compiler check for ARMv8.1 and SVEAlex Bennée
We will need this for some tests later. The docker images already support it by default. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200203090932.19147-13-alex.bennee@linaro.org>
2020-01-23tests/tcg/aarch64: Add pauth-4Richard Henderson
Perform the set of operations and test described in LP 1859713. Suggested-by: Adrien GRASSEIN <adrien.grassein@smile.fr> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200116230809.19078-5-richard.henderson@linaro.org [PMM: fixed hard-coded tabs] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-23tests/tcg/aarch64: Add pauth-3Richard Henderson
This is the test vector from the QARMA paper, run through PACGA. Suggested-by: Vincent Dehors <vincent.dehors@smile.fr> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200116230809.19078-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-23tests/tcg/aarch64: Fix compilation parameters for pauth-%Richard Henderson
We were incorrectly requiring ARMv8.4 support for the pauth tests, but Pointer Authentication is an ARMv8.3 extension. Further, hiding the required architecture within asm() is not correct. Correct the architecture version requested, and specify it in the cflags of the (cross-) compiler rather than in the asm. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200116230809.19078-3-richard.henderson@linaro.org [PMM: tweaked commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-09tests/tcg: add user version of dumb-as-bricks semiconsole testAlex Bennée
There are linux-user users of semihosting so we'd better check things work for them as well. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2020-01-09tests/tcg: extract __semi_call into a header and expandAlex Bennée
There are two types of ARM semicall - lets test them both. Putting the logic in a header will make re-using the functions easier later. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2020-01-09tests/tcg: add a dumb-as-bricks semihosting console testAlex Bennée
We don't run this during check-tcg as we would need to check stuff is echoed back. However we can still build the binary so people can test it manually. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-12-19tests/tcg: ensure we re-configure if configure.sh is updatedAlex Bennée
We were only doing this if docker was enabled which isn't quite right. Fixes: fc76c56d3f47 Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191211170520.7747-17-alex.bennee@linaro.org>
2019-12-18configure: allow disable of cross compilation containersAlex Bennée
Our docker infrastructure isn't quite as multiarch as we would wish so lets allow the user to disable it if they want. This will allow us to use still run check-tcg on non-x86 CI setups. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Cleber Rosa <crosa@redhat.com> Tested-by: Cleber Rosa <crosa@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Richard Henderson <richard.henderson@linaro.org>
2019-11-20tests/tcg: modify multiarch tests to work with clangTaylor Simpson
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <1574032465-12186-1-git-send-email-tsimpson@quicinc.com> [AJB: tweak header line] Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-11-06tests/tcg/multiarch/linux-test: Fix error check for shmatRichard Henderson
The error indicator for this syscall is -1, not 0. Fixes: e374bfa35bfb ("shm tests - disabled clone test") Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191106113318.10226-3-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-10-28tests/tcg: enable plugin testingAlex Bennée
If CONFIG_PLUGINS is enabled then lets enable testing for all our TCG targets. This is a simple smoke test that ensure we don't crash or otherwise barf out by running each plugin against each test. There is a minor knock on effect for additional runners which need specialised QEMU_OPTS which will also need to declare a plugin version of the runner. If this gets onerous we might need to add another helper. Checking the results of the plugins is left for a later exercise. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-10-28tests/tcg: drop test-i386-fprem from TESTS when not SLOWAlex Bennée
This is a very slow running test which we only enable explicitly. However having it in the TESTS lists would confuse additional tests like the plugins test which want to run on all currently enabled tests. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-10-28tests/tcg: move "virtual" tests to EXTRA_TESTSAlex Bennée
Otherwise clever expanders like the plugins test get unstuck. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-10-28tests/tcg: set QEMU_OPTS for all cris runsAlex Bennée
This will important for ensuring the plugin test variants will also work. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-10-28tests/tcg/Makefile.target: fix path to config-host.makAlex Bennée
Since moving where the tests are run the path to config-host.mak has been wrong. This doesn't affect much but things like the time fallback for CONFIG_DEBUG_TCG and will also get in the way of checking for PLUGINS support. Fixes: fc76c56d3f4 Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-09-30Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20190927' into staging target-arm queue: * Fix the CBAR register implementation for Cortex-A53, Cortex-A57, Cortex-A72 * Fix direct booting of Linux kernels on emulated CPUs which have an AArch32 EL3 (incorrect NSACR settings meant they could not access the FPU) * semihosting cleanup: do more work at translate time and less work at runtime # gpg: Signature made Fri 27 Sep 2019 15:32:43 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20190927: hw/arm/boot: Use the IEC binary prefix definitions hw/arm/boot.c: Set NSACR.{CP11,CP10} for NS kernel boots tests/tcg: add linux-user semihosting smoke test for ARM target/arm: remove run-time semihosting checks for linux-user target/arm: remove run time semihosting checks target/arm: handle A-profile semihosting at translate time target/arm: handle M-profile semihosting at translate time tests/tcg: clean-up some comments after the de-tangling target/arm: fix CBAR register for AArch64 CPUs Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # tests/tcg/arm/Makefile.target
2019-09-27tests/tcg: add linux-user semihosting smoke test for ARMAlex Bennée
We already use semihosting for the system stuff so this is a simple smoke test to ensure we are working OK on linux-user. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20190913151845.12582-7-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-27tests/tcg: clean-up some comments after the de-tanglingAlex Bennée
These were missed in the recent de-tangling so have been updated to be more actuate. I've also built up ARM_TESTS in a manner similar to AARCH64_TESTS for better consistency. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20190913151845.12582-2-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-09-26tests/tcg: add simple record/replay smoke test for aarch64Alex Bennée
This adds two new tests that re-use the memory test to check basic record replay functionality is still working. We have to define our own runners rather than using the default pattern as we want to change the test name but re-use the memory binary. We declare the test binaries as PHONY as they don't really exist. [AJB: A better test would output some sort of timer value or other otherwise variable value so we could compare the record and replay outputs and ensure they match] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Pavel Dovgalyuk <dovgaluk@ispras.ru>
2019-09-26tests/tcg: add generic version of float_convsAlex Bennée
This is broadly similar to the existing fcvt test for ARM but using the generic float testing framework. We should be able to pare down the ARM fcvt test case to purely half-precision with or without the Alt HP provision. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-09-26tests/tcg: add float_madds test to multiarchAlex Bennée
This is a generic floating point multiply and accumulate test for single precision floating point values. I've split of the common float functions into a helper library so additional tests can use the same common code. As I don't have references for all architectures I've allowed some flexibility for tests to pass without reference files. They can be added as we get collect them. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-09-26tests/tcg: re-enable linux-test for ppc64abi32Alex Bennée
Now we have fixed the signal delivary bug we can remove this horrible hack from the system. Cc: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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