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2019-02-28tests/tcg/xtensa: conditionalize cache option testsMax Filippov
Make data/instruction tests conditional on the presence of data/instruction cache, whether they're lockable and whether data cache is writeback. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize debug option testsMax Filippov
Make debug tests conditional on the presence of the debug option in the config and tests that depend on the presence/number of instruction or data breakpoint registers on the corresponding definitions. Use configured debug interrupt level instead of the hardcoded value to set up IRQ handler and access debug EPC register. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: enable boolean testsMax Filippov
Uncomment test_boolean in the test makefile. Make actual tests code conditional on the presence of boolean option in the config. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: fix endianness issues in test_bMax Filippov
Use bbci.l/bbsi.l instead of bbci/bbsi, as they are assembly macros that accept little-endian bit number and produce correct immediate for both little and big endian configurations. Choose value loaded into register for bbc/bbs opcodes based on configuration endianness. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: don't use optional opcodes in generic codeMax Filippov
Don't use 'loop' opcode in generic testsuite completion code, only use core opcodes to make it work with any configuration. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: support configs with LITBASEMax Filippov
Configurations with LITBASE register may use absolute literals by default. Pass --no-absolute-literals option to assembler to use PC-relative literals instead. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: support configurations w/o vecbaseMax Filippov
Configurations w/o vecbase may have vectors not grouped together and not in fixed order. They may not always be grouped into single output sections by assigning next offset to dot, as it may sometimes move dot backwards and sometimes they may even belong to different memory region. Don't group vectors into single output section. Instead put each vector into its own section ant put it at its default virtual address. Reserve 4KBytes from the default vectors base and put rest of the code and data starting from there. Mark vectors sections as executable, otherwise their contents is discarded. There may be as little as 16 bytes reserved for some vectors, load handler address into a0 and use ret.n to jump there to make vector code fit into this 16 byte space. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: indicate failed testsMax Filippov
When test suite with multiple tests fails it's not obvious which test failed. Pring "failed" in every invocation of test_fail. Do printing when DEBUG preprocessor macro is defined. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-27tests/tcg: target/mips: Add tests for MSA integer max/min instructionsAleksandar Markovic
Add tests for MSA integer max/min instructions. This includes following instructions: * MAX_A.B - maximum of absolute of two signed values (bytes) * MAX_A.H - maximum of absolute of two signed values (halfwords) * MAX_A.W - maximum of absolute of two signed values (words) * MAX_A.D - maximum of absolute of two signed values (doublewords) * MIN_A.B - minimum of absolute of two signed values (bytes) * MIN_A.H - minimum of absolute of two signed values (halfwords) * MIN_A.W - minimum of absolute of two signed values (words) * MIN_A.D - minimum of absolute of two signed values (doublewords) * MAX_S.B - maximum of two signed values (bytes) * MAX_S.H - maximum of two signed values (halfwords) * MAX_S.W - maximum of two signed values (words) * MAX_S.D - maximum of two signed values (doublewords) * MIN_S.B - minimum of two signed values (bytes) * MIN_S.H - minimum of two signed values (halfwords) * MIN_S.W - minimum of two signed values (words) * MIN_S.D - minimum of two signed values (doublewords) * MAX_U.B - maximum of two unsigned values (bytes) * MAX_U.H - maximum of two unsigned values (halfwords) * MAX_U.W - maximum of two unsigned values (words) * MAX_U.D - maximum of two unsigned values (doublewords) * MIN_U.B - minimum of two unsigned values (bytes) * MIN_U.H - minimum of two unsigned values (halfwords) * MIN_U.W - minimum of two unsigned values (words) * MIN_U.D - minimum of two unsigned values (doublewords) Each test consists of 80 test cases, so altogether there are 1920 test cases. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551185735-17154-8-git-send-email-aleksandar.markovic@rt-rk.com>
2019-02-27tests/tcg: target/mips: Add wrappers for MSA integer max/min instructionsAleksandar Markovic
Add wrappers for MSA integer max/min instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551185735-17154-7-git-send-email-aleksandar.markovic@rt-rk.com>
2019-02-27tests/tcg: target/mips: Add tests for MSA integer compare instructionsAleksandar Markovic
Add tests for MSA integer compare instructions. This includes following instructions: * CEQ.B - integer compare equal (bytes) * CEQ.H - integer compare equal (halfwords) * CEQ.W - integer compare equal (words) * CEQ.D - integer compare equal (doublewords) * CLE_S.B - signed integer compare less or equal (bytes) * CLE_S.H - signed integer compare less or equal (halfwords) * CLE_S.W - signed integer compare less or equal (words) * CLE_S.D - signed integer compare less or equal (doublewords) * CLE_U.B - unsigned integer compare less or equal (bytes) * CLE_U.H - unsigned integer compare less or equal (halfwords) * CLE_U.W - unsigned integer compare less or equal (words) * CLE_U.D - unsigned integer compare less or equal (doublewords) * CLT_S.B - signed integer compare less or equal (bytes) * CLT_S.H - signed integer compare less or equal (halfwords) * CLT_S.W - signed integer compare less or equal (words) * CLT_S.D - signed integer compare less or equal (doublewords) * CLT_U.B - unsigned integer compare less or equal (bytes) * CLT_U.H - unsigned integer compare less or equal (halfwords) * CLT_U.W - unsigned integer compare less or equal (words) * CLT_U.D - unsigned integer compare less or equal (doublewords) Each test consists of 80 test cases, so altogether there are 1600 test cases. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551185735-17154-2-git-send-email-aleksandar.markovic@rt-rk.com>
2019-02-21tests/tcg: target/mips: Add wrappers for MSA integer compare instructionsAleksandar Markovic
Add wrappers for MSA integer compare instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
2019-02-21tests/tcg: target/mips: Change directory name 'bit-counting' to 'bit-count'Aleksandar Markovic
Change directory name 'bit-counting' to 'bit-count'. This is just for cosmetic and consistency sake. This was the only subdirectory in MSA test directory that uses ending 'ing'. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-02-21tests/tcg: target/mips: Correct path to headers in some test source filesAleksandar Markovic
Correct path to headers in tests/tcg/mips/user/ase/msa/bit-counting/* source files. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add tests for MSA logic instructionsAleksandar Markovic
Add tests for MSA logic instructions. This includes following instructions: * AND.V - logical AND * NOR.V - logical NOR * OR.V - logical OR * XOR.V - logical XOR Each test consists of 80 test cases, so altogether there are 320 test cases. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add wrappers for MSA logic instructionsAleksandar Markovic
Add wrappers for MSA logic instructions. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add tests for MSA interleave instructionsAleksandar Markovic
Add tests for MSA interleave instructions. This includes following instructions: * ILVEV.B - interleave even (bytes) * ILVEV.H - interleave even (halfwords) * ILVEV.W - interleave even (words) * ILVEV.D - interleave even (doublewords) * ILVOD.B - interleave odd (bytes) * ILVOD.H - interleave odd (halfwords) * ILVOD.W - interleave odd (words) * ILVOD.D - interleave odd (doublewords) * ILVL.B - interleave left (bytes) * ILVL.H - interleave left (halfwords) * ILVL.W - interleave left (words) * ILVL.D - interleave left (doublewords) * ILVR.B - interleave right (bytes) * ILVR.H - interleave right (halfwords) * ILVR.W - interleave right (words) * ILVR.D - interleave right (doublewords) Each test consists of 80 test cases, so altogether there are 1280 test cases. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add wrappers for MSA interleave instructionsAleksandar Markovic
Add wrappers for MSA interleave instructions. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add tests for MSA bit counting instructionsAleksandar Markovic
Add tests for MSA bit counting instructions. This includes following instructions: * NLOC.B - number of leading ones (bytes) * NLOC.H - number of leading ones (halfwords) * NLOC.W - number of leading ones (words) * NLOC.D - number of leading ones (doublewords) * NLZC.B - number of leading zeros (bytes) * NLZC.H - number of leading zeros (halfwords) * NLZC.W - number of leading zeros (words) * NLZC.D - number of leading zeros (doublewords) * PCNT.B - population count / number of ones (bytes) * PCNT.H - population count / number of ones (halfwords) * PCNT.W - population count / number of ones (words) * PCNT.D - population count / number of ones (doublewords) Each test consists of 80 test cases, so altogether there are 960 test cases. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add wrappers for MSA bit counting instructionsAleksandar Markovic
Add a header that contains wrappers around MSA instructions assembler invocations. For now, only bit counting instructions (NLOC, NLZC, and PCNT; each in four data format flavors) are supported. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add a header with test utilitiesAleksandar Markovic
Add a header that contains test utilities. For now, it contains only a function for checking and printing test results for bit counting and similar MSA instructions. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add a header with test inputsAleksandar Markovic
The file tests/tcg/mips/include/test_inputs.h is planned to contain various test inputs. For now, it contains 64 128-bit pattern inputs (alternating groups od ones and zeroes) and 16 128-bit random inputs. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Remove an unnecessary fileAleksandar Markovic
Remove a file that was added long time ago by mistake. The commit that introduced this file was commit d70080c4 (from 2012). Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-08docker: add debian-buster-arm64-crossAlex Bennée
We can't build QEMU with this but we can use this image to build newer arm64 testcases which need more up to date tools. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-02-05tests/tcg/aarch64: Add pauth smoke testRichard Henderson
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190201195404.30486-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-01-24tests: tcg: mips: Remove old directoriesAleksandar Markovic
Remove old test directories. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-01-24tests: tcg: mips: Add two new MakefilesAleksandar Markovic
Add Makefiles for two new direcitories. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-01-24tests: tcg: mips: Move source files to new locationsAleksandar Markovic
MIPS TCG test will be organized by ISAs and ASEs in future. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-01-11avoid TABs in files that only contain a fewPaolo Bonzini
Most files that have TABs only contain a handful of them. Change them to spaces so that we don't confuse people. disas, standard-headers, linux-headers and libdecnumber are imported from other projects and probably should be exempted from the check. Outside those, after this patch the following files still contain both 8-space and TAB sequences at the beginning of the line. Many of them have a majority of TABs, or were initially committed with all tabs. bsd-user/i386/target_syscall.h bsd-user/x86_64/target_syscall.h crypto/aes.c hw/audio/fmopl.c hw/audio/fmopl.h hw/block/tc58128.c hw/display/cirrus_vga.c hw/display/xenfb.c hw/dma/etraxfs_dma.c hw/intc/sh_intc.c hw/misc/mst_fpga.c hw/net/pcnet.c hw/sh4/sh7750.c hw/timer/m48t59.c hw/timer/sh_timer.c include/crypto/aes.h include/disas/bfd.h include/hw/sh4/sh.h libdecnumber/decNumber.c linux-headers/asm-generic/unistd.h linux-headers/linux/kvm.h linux-user/alpha/target_syscall.h linux-user/arm/nwfpe/double_cpdo.c linux-user/arm/nwfpe/fpa11_cpdt.c linux-user/arm/nwfpe/fpa11_cprt.c linux-user/arm/nwfpe/fpa11.h linux-user/flat.h linux-user/flatload.c linux-user/i386/target_syscall.h linux-user/ppc/target_syscall.h linux-user/sparc/target_syscall.h linux-user/syscall.c linux-user/syscall_defs.h linux-user/x86_64/target_syscall.h slirp/cksum.c slirp/if.c slirp/ip.h slirp/ip_icmp.c slirp/ip_icmp.h slirp/ip_input.c slirp/ip_output.c slirp/mbuf.c slirp/misc.c slirp/sbuf.c slirp/socket.c slirp/socket.h slirp/tcp_input.c slirp/tcpip.h slirp/tcp_output.c slirp/tcp_subr.c slirp/tcp_timer.c slirp/tftp.c slirp/udp.c slirp/udp.h target/cris/cpu.h target/cris/mmu.c target/cris/op_helper.c target/sh4/helper.c target/sh4/op_helper.c target/sh4/translate.c tcg/sparc/tcg-target.inc.c tests/tcg/cris/check_addo.c tests/tcg/cris/check_moveq.c tests/tcg/cris/check_swap.c tests/tcg/multiarch/test-mmap.c ui/vnc-enc-hextile-template.h ui/vnc-enc-zywrle.h util/envlist.c util/readline.c The following have only TABs: bsd-user/i386/target_signal.h bsd-user/sparc64/target_signal.h bsd-user/sparc64/target_syscall.h bsd-user/sparc/target_signal.h bsd-user/sparc/target_syscall.h bsd-user/x86_64/target_signal.h crypto/desrfb.c hw/audio/intel-hda-defs.h hw/core/uboot_image.h hw/sh4/sh7750_regnames.c hw/sh4/sh7750_regs.h include/hw/cris/etraxfs_dma.h linux-user/alpha/termbits.h linux-user/arm/nwfpe/fpopcode.h linux-user/arm/nwfpe/fpsr.h linux-user/arm/syscall_nr.h linux-user/arm/target_signal.h linux-user/cris/target_signal.h linux-user/i386/target_signal.h linux-user/linux_loop.h linux-user/m68k/target_signal.h linux-user/microblaze/target_signal.h linux-user/mips64/target_signal.h linux-user/mips/target_signal.h linux-user/mips/target_syscall.h linux-user/mips/termbits.h linux-user/ppc/target_signal.h linux-user/sh4/target_signal.h linux-user/sh4/termbits.h linux-user/sparc64/target_syscall.h linux-user/sparc/target_signal.h linux-user/x86_64/target_signal.h linux-user/x86_64/termbits.h pc-bios/optionrom/optionrom.h slirp/mbuf.h slirp/misc.h slirp/sbuf.h slirp/tcp.h slirp/tcp_timer.h slirp/tcp_var.h target/i386/svm.h target/sparc/asi.h target/xtensa/core-dc232b/xtensa-modules.inc.c target/xtensa/core-dc233c/xtensa-modules.inc.c target/xtensa/core-de212/core-isa.h target/xtensa/core-de212/xtensa-modules.inc.c target/xtensa/core-fsf/xtensa-modules.inc.c target/xtensa/core-sample_controller/core-isa.h target/xtensa/core-sample_controller/xtensa-modules.inc.c target/xtensa/core-test_kc705_be/core-isa.h target/xtensa/core-test_kc705_be/xtensa-modules.inc.c tests/tcg/cris/check_abs.c tests/tcg/cris/check_addc.c tests/tcg/cris/check_addcm.c tests/tcg/cris/check_addoq.c tests/tcg/cris/check_bound.c tests/tcg/cris/check_ftag.c tests/tcg/cris/check_int64.c tests/tcg/cris/check_lz.c tests/tcg/cris/check_openpf5.c tests/tcg/cris/check_sigalrm.c tests/tcg/cris/crisutils.h tests/tcg/cris/sys.c tests/tcg/i386/test-i386-ssse3.c ui/vgafont.h Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20181213223737.11793-3-pbonzini@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Eric Blake <eblake@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-01-11remove space-tab sequencesPaolo Bonzini
There are not many, and they are all simple mistakes that ended up being committed. Remove them. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20181213223737.11793-2-pbonzini@redhat.com> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-01-03tests/tcg: mips: Test R5900 three-operand MADDU1Fredrik Noring
Test R5900 three-operand MADDU1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org>
2019-01-03tests/tcg: mips: Test R5900 three-operand MADDUFredrik Noring
Test R5900 three-operand MADDU. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org>
2019-01-03tests/tcg: mips: Test R5900 three-operand MADD1Fredrik Noring
Test R5900 three-operand MADD1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org>
2019-01-03tests/tcg: mips: Test R5900 three-operand MADDFredrik Noring
Test R5900 three-operand MADD. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org>
2018-12-11Fixes i386 xchgq testfabrice.desclaux@cea.fr
As "xchg" reads and writes both operands, the "+m" is required to avoid undefined behavior on -O2 compilation. Signed-off-by: Fabrice Desclaux <fabrice.desclaux@cea.fr> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <03506cf0-a204-f619-8ee4-4990a5e69af5@cea.fr> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-11-14tests/tcg/multiarch: fix 32bit linux-test on 64bit hostLaurent Vivier
Fix: TEST linux-test on i386 .../tests/tcg/multiarch/linux-test.c:201: readdir readdir() calls getdents64() to have the list of the entries in a directory, and getdents64() can return 64bit d_off values (with ext4, for instance) that will not fit in the 32bit d_off field of the readdir() dirent structure. To avoid that, use readdir64() to use a 64bit d_off field too. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2018-10-26tests: Fix typos in comments and help message (found by codespell)Stefan Weil
Fix also a grammar issue. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20180713054755.23323-1-sw@weilnetz.de> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-10-26tests/tcg/README: fix location for lm32 testsCleber Rosa
Point to the right and obvious location for lm32 tests. Signed-off-by: Cleber Rosa <crosa@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20181004161852.11673-3-crosa@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-10-24tests/tcg/mips: Add tests for R5900 DIVU1Fredrik Noring
Add a test for DIVU1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24tests/tcg/mips: Add tests for R5900 DIV1Fredrik Noring
Add a test for DIV1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24tests/tcg/mips: Add tests for R5900 MTLO1 and MTHI1Fredrik Noring
Add a test for MTLO1 and MTHI1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24tests/tcg/mips: Add tests for R5900 MFLO1 and MFHI1Fredrik Noring
Add a test for MFLO1 and MFHI1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24tests/tcg/mips: Add tests for R5900 three-operand MULTU1Fredrik Noring
Add a test for MULTU1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24tests/tcg/mips: Add tests for R5900 three-operand MULT1Fredrik Noring
Add a test for MULT1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24tests/tcg/mips: Add tests for R5900 three-operand MULTUFredrik Noring
Add a test for MULTU. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24tests/tcg/mips: Add tests for R5900 three-operand MULTFredrik Noring
Add a test for MULT. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-09-25Merge remote-tracking branch 'remotes/xtensa/tags/20180918-xtensa' into stagingPeter Maydell
target/xtensa updates: - fix gdbstub register counts; - add big-endian core test_kc705_be; - convert to do_transaction_failed and add test for failed memory transactions; - fix couple FPU2000 bugs; - fix s32c1i implementation; - clean up exception handlers generation in xtensa tests; - add support for semihosting console input through a chardev. # gpg: Signature made Tue 18 Sep 2018 18:35:50 BST # gpg: using RSA key 51F9CC91F83FA044 # gpg: Good signature from "Max Filippov <filippov@cadence.com>" # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20180918-xtensa: target/xtensa: support input from chardev console target/xtensa: fix s32c1i TCGMemOp flags tests/tcg/xtensa: only generate defined exception handlers tests/tcg/xtensa: move exception handlers to separate section target/xtensa: fix FPU2000 bugs tests/tcg/xtensa: add test for failed memory transactions target/xtensa: convert to do_transaction_failed target/xtensa: add test_kc705_be core target/xtensa: clean up gdbstub register handling target/xtensa: fix gdbstub register counts Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-09-17tests/tcg/xtensa: only generate defined exception handlersMax Filippov
Don't generate handlers for IRQ levels that are not defined for the CPU or for window overflow/underflow exceptions for configs w/o windowed registers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-09-17tests/tcg/xtensa: move exception handlers to separate sectionMax Filippov
Not all CPU configurations may have enough space for handler code between exception/interrupt vectors. Leave jumps to the handlers at the vectors, but move all handlers past the vectors area. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-09-17tests/tcg/xtensa: add test for failed memory transactionsMax Filippov
Failed memory transactions should raise exceptions 14 (for fetch) or 15 (for load/store) with XEA2. Memory accesses that result in TLB miss followed by an attempt to load PTE from physical memory which fails should raise InstTLBMiss or LoadStoreTLBMiss with XEA2. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-16 17:45:11 +0000