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2019-02-14tests/tcg: target/mips: Add tests for MSA logic instructionsAleksandar Markovic
Add tests for MSA logic instructions. This includes following instructions: * AND.V - logical AND * NOR.V - logical NOR * OR.V - logical OR * XOR.V - logical XOR Each test consists of 80 test cases, so altogether there are 320 test cases. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add wrappers for MSA logic instructionsAleksandar Markovic
Add wrappers for MSA logic instructions. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add tests for MSA interleave instructionsAleksandar Markovic
Add tests for MSA interleave instructions. This includes following instructions: * ILVEV.B - interleave even (bytes) * ILVEV.H - interleave even (halfwords) * ILVEV.W - interleave even (words) * ILVEV.D - interleave even (doublewords) * ILVOD.B - interleave odd (bytes) * ILVOD.H - interleave odd (halfwords) * ILVOD.W - interleave odd (words) * ILVOD.D - interleave odd (doublewords) * ILVL.B - interleave left (bytes) * ILVL.H - interleave left (halfwords) * ILVL.W - interleave left (words) * ILVL.D - interleave left (doublewords) * ILVR.B - interleave right (bytes) * ILVR.H - interleave right (halfwords) * ILVR.W - interleave right (words) * ILVR.D - interleave right (doublewords) Each test consists of 80 test cases, so altogether there are 1280 test cases. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add wrappers for MSA interleave instructionsAleksandar Markovic
Add wrappers for MSA interleave instructions. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add tests for MSA bit counting instructionsAleksandar Markovic
Add tests for MSA bit counting instructions. This includes following instructions: * NLOC.B - number of leading ones (bytes) * NLOC.H - number of leading ones (halfwords) * NLOC.W - number of leading ones (words) * NLOC.D - number of leading ones (doublewords) * NLZC.B - number of leading zeros (bytes) * NLZC.H - number of leading zeros (halfwords) * NLZC.W - number of leading zeros (words) * NLZC.D - number of leading zeros (doublewords) * PCNT.B - population count / number of ones (bytes) * PCNT.H - population count / number of ones (halfwords) * PCNT.W - population count / number of ones (words) * PCNT.D - population count / number of ones (doublewords) Each test consists of 80 test cases, so altogether there are 960 test cases. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add wrappers for MSA bit counting instructionsAleksandar Markovic
Add a header that contains wrappers around MSA instructions assembler invocations. For now, only bit counting instructions (NLOC, NLZC, and PCNT; each in four data format flavors) are supported. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add a header with test utilitiesAleksandar Markovic
Add a header that contains test utilities. For now, it contains only a function for checking and printing test results for bit counting and similar MSA instructions. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add a header with test inputsAleksandar Markovic
The file tests/tcg/mips/include/test_inputs.h is planned to contain various test inputs. For now, it contains 64 128-bit pattern inputs (alternating groups od ones and zeroes) and 16 128-bit random inputs. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Remove an unnecessary fileAleksandar Markovic
Remove a file that was added long time ago by mistake. The commit that introduced this file was commit d70080c4 (from 2012). Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-08docker: add debian-buster-arm64-crossAlex Bennée
We can't build QEMU with this but we can use this image to build newer arm64 testcases which need more up to date tools. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-02-05tests/tcg/aarch64: Add pauth smoke testRichard Henderson
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190201195404.30486-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-01-24tests: tcg: mips: Remove old directoriesAleksandar Markovic
Remove old test directories. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-01-24tests: tcg: mips: Add two new MakefilesAleksandar Markovic
Add Makefiles for two new direcitories. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-01-24tests: tcg: mips: Move source files to new locationsAleksandar Markovic
MIPS TCG test will be organized by ISAs and ASEs in future. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-01-11avoid TABs in files that only contain a fewPaolo Bonzini
Most files that have TABs only contain a handful of them. Change them to spaces so that we don't confuse people. disas, standard-headers, linux-headers and libdecnumber are imported from other projects and probably should be exempted from the check. Outside those, after this patch the following files still contain both 8-space and TAB sequences at the beginning of the line. Many of them have a majority of TABs, or were initially committed with all tabs. bsd-user/i386/target_syscall.h bsd-user/x86_64/target_syscall.h crypto/aes.c hw/audio/fmopl.c hw/audio/fmopl.h hw/block/tc58128.c hw/display/cirrus_vga.c hw/display/xenfb.c hw/dma/etraxfs_dma.c hw/intc/sh_intc.c hw/misc/mst_fpga.c hw/net/pcnet.c hw/sh4/sh7750.c hw/timer/m48t59.c hw/timer/sh_timer.c include/crypto/aes.h include/disas/bfd.h include/hw/sh4/sh.h libdecnumber/decNumber.c linux-headers/asm-generic/unistd.h linux-headers/linux/kvm.h linux-user/alpha/target_syscall.h linux-user/arm/nwfpe/double_cpdo.c linux-user/arm/nwfpe/fpa11_cpdt.c linux-user/arm/nwfpe/fpa11_cprt.c linux-user/arm/nwfpe/fpa11.h linux-user/flat.h linux-user/flatload.c linux-user/i386/target_syscall.h linux-user/ppc/target_syscall.h linux-user/sparc/target_syscall.h linux-user/syscall.c linux-user/syscall_defs.h linux-user/x86_64/target_syscall.h slirp/cksum.c slirp/if.c slirp/ip.h slirp/ip_icmp.c slirp/ip_icmp.h slirp/ip_input.c slirp/ip_output.c slirp/mbuf.c slirp/misc.c slirp/sbuf.c slirp/socket.c slirp/socket.h slirp/tcp_input.c slirp/tcpip.h slirp/tcp_output.c slirp/tcp_subr.c slirp/tcp_timer.c slirp/tftp.c slirp/udp.c slirp/udp.h target/cris/cpu.h target/cris/mmu.c target/cris/op_helper.c target/sh4/helper.c target/sh4/op_helper.c target/sh4/translate.c tcg/sparc/tcg-target.inc.c tests/tcg/cris/check_addo.c tests/tcg/cris/check_moveq.c tests/tcg/cris/check_swap.c tests/tcg/multiarch/test-mmap.c ui/vnc-enc-hextile-template.h ui/vnc-enc-zywrle.h util/envlist.c util/readline.c The following have only TABs: bsd-user/i386/target_signal.h bsd-user/sparc64/target_signal.h bsd-user/sparc64/target_syscall.h bsd-user/sparc/target_signal.h bsd-user/sparc/target_syscall.h bsd-user/x86_64/target_signal.h crypto/desrfb.c hw/audio/intel-hda-defs.h hw/core/uboot_image.h hw/sh4/sh7750_regnames.c hw/sh4/sh7750_regs.h include/hw/cris/etraxfs_dma.h linux-user/alpha/termbits.h linux-user/arm/nwfpe/fpopcode.h linux-user/arm/nwfpe/fpsr.h linux-user/arm/syscall_nr.h linux-user/arm/target_signal.h linux-user/cris/target_signal.h linux-user/i386/target_signal.h linux-user/linux_loop.h linux-user/m68k/target_signal.h linux-user/microblaze/target_signal.h linux-user/mips64/target_signal.h linux-user/mips/target_signal.h linux-user/mips/target_syscall.h linux-user/mips/termbits.h linux-user/ppc/target_signal.h linux-user/sh4/target_signal.h linux-user/sh4/termbits.h linux-user/sparc64/target_syscall.h linux-user/sparc/target_signal.h linux-user/x86_64/target_signal.h linux-user/x86_64/termbits.h pc-bios/optionrom/optionrom.h slirp/mbuf.h slirp/misc.h slirp/sbuf.h slirp/tcp.h slirp/tcp_timer.h slirp/tcp_var.h target/i386/svm.h target/sparc/asi.h target/xtensa/core-dc232b/xtensa-modules.inc.c target/xtensa/core-dc233c/xtensa-modules.inc.c target/xtensa/core-de212/core-isa.h target/xtensa/core-de212/xtensa-modules.inc.c target/xtensa/core-fsf/xtensa-modules.inc.c target/xtensa/core-sample_controller/core-isa.h target/xtensa/core-sample_controller/xtensa-modules.inc.c target/xtensa/core-test_kc705_be/core-isa.h target/xtensa/core-test_kc705_be/xtensa-modules.inc.c tests/tcg/cris/check_abs.c tests/tcg/cris/check_addc.c tests/tcg/cris/check_addcm.c tests/tcg/cris/check_addoq.c tests/tcg/cris/check_bound.c tests/tcg/cris/check_ftag.c tests/tcg/cris/check_int64.c tests/tcg/cris/check_lz.c tests/tcg/cris/check_openpf5.c tests/tcg/cris/check_sigalrm.c tests/tcg/cris/crisutils.h tests/tcg/cris/sys.c tests/tcg/i386/test-i386-ssse3.c ui/vgafont.h Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20181213223737.11793-3-pbonzini@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Eric Blake <eblake@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-01-11remove space-tab sequencesPaolo Bonzini
There are not many, and they are all simple mistakes that ended up being committed. Remove them. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20181213223737.11793-2-pbonzini@redhat.com> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-01-03tests/tcg: mips: Test R5900 three-operand MADDU1Fredrik Noring
Test R5900 three-operand MADDU1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org>
2019-01-03tests/tcg: mips: Test R5900 three-operand MADDUFredrik Noring
Test R5900 three-operand MADDU. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org>
2019-01-03tests/tcg: mips: Test R5900 three-operand MADD1Fredrik Noring
Test R5900 three-operand MADD1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org>
2019-01-03tests/tcg: mips: Test R5900 three-operand MADDFredrik Noring
Test R5900 three-operand MADD. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org>
2018-12-11Fixes i386 xchgq testfabrice.desclaux@cea.fr
As "xchg" reads and writes both operands, the "+m" is required to avoid undefined behavior on -O2 compilation. Signed-off-by: Fabrice Desclaux <fabrice.desclaux@cea.fr> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <03506cf0-a204-f619-8ee4-4990a5e69af5@cea.fr> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-11-14tests/tcg/multiarch: fix 32bit linux-test on 64bit hostLaurent Vivier
Fix: TEST linux-test on i386 .../tests/tcg/multiarch/linux-test.c:201: readdir readdir() calls getdents64() to have the list of the entries in a directory, and getdents64() can return 64bit d_off values (with ext4, for instance) that will not fit in the 32bit d_off field of the readdir() dirent structure. To avoid that, use readdir64() to use a 64bit d_off field too. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2018-10-26tests: Fix typos in comments and help message (found by codespell)Stefan Weil
Fix also a grammar issue. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20180713054755.23323-1-sw@weilnetz.de> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-10-26tests/tcg/README: fix location for lm32 testsCleber Rosa
Point to the right and obvious location for lm32 tests. Signed-off-by: Cleber Rosa <crosa@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20181004161852.11673-3-crosa@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-10-24tests/tcg/mips: Add tests for R5900 DIVU1Fredrik Noring
Add a test for DIVU1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24tests/tcg/mips: Add tests for R5900 DIV1Fredrik Noring
Add a test for DIV1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24tests/tcg/mips: Add tests for R5900 MTLO1 and MTHI1Fredrik Noring
Add a test for MTLO1 and MTHI1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24tests/tcg/mips: Add tests for R5900 MFLO1 and MFHI1Fredrik Noring
Add a test for MFLO1 and MFHI1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24tests/tcg/mips: Add tests for R5900 three-operand MULTU1Fredrik Noring
Add a test for MULTU1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24tests/tcg/mips: Add tests for R5900 three-operand MULT1Fredrik Noring
Add a test for MULT1. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24tests/tcg/mips: Add tests for R5900 three-operand MULTUFredrik Noring
Add a test for MULTU. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24tests/tcg/mips: Add tests for R5900 three-operand MULTFredrik Noring
Add a test for MULT. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-09-25Merge remote-tracking branch 'remotes/xtensa/tags/20180918-xtensa' into stagingPeter Maydell
target/xtensa updates: - fix gdbstub register counts; - add big-endian core test_kc705_be; - convert to do_transaction_failed and add test for failed memory transactions; - fix couple FPU2000 bugs; - fix s32c1i implementation; - clean up exception handlers generation in xtensa tests; - add support for semihosting console input through a chardev. # gpg: Signature made Tue 18 Sep 2018 18:35:50 BST # gpg: using RSA key 51F9CC91F83FA044 # gpg: Good signature from "Max Filippov <filippov@cadence.com>" # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20180918-xtensa: target/xtensa: support input from chardev console target/xtensa: fix s32c1i TCGMemOp flags tests/tcg/xtensa: only generate defined exception handlers tests/tcg/xtensa: move exception handlers to separate section target/xtensa: fix FPU2000 bugs tests/tcg/xtensa: add test for failed memory transactions target/xtensa: convert to do_transaction_failed target/xtensa: add test_kc705_be core target/xtensa: clean up gdbstub register handling target/xtensa: fix gdbstub register counts Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-09-17tests/tcg/xtensa: only generate defined exception handlersMax Filippov
Don't generate handlers for IRQ levels that are not defined for the CPU or for window overflow/underflow exceptions for configs w/o windowed registers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-09-17tests/tcg/xtensa: move exception handlers to separate sectionMax Filippov
Not all CPU configurations may have enough space for handler code between exception/interrupt vectors. Leave jumps to the handlers at the vectors, but move all handlers past the vectors area. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-09-17tests/tcg/xtensa: add test for failed memory transactionsMax Filippov
Failed memory transactions should raise exceptions 14 (for fetch) or 15 (for load/store) with XEA2. Memory accesses that result in TLB miss followed by an attempt to load PTE from physical memory which fails should raise InstTLBMiss or LoadStoreTLBMiss with XEA2. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-08-28target/s390x: fix PACK reading 1 byte less and writing 1 byte morePavel Zbitskiy
PACK fails on the test from the Principles of Operation: F1F2F3F4 becomes 0000234C instead of 0001234C due to an off-by-one error. Furthermore, it overwrites one extra byte to the left of F1. If len_dest is 0, then we only want to flip the 1st byte and never loop over the rest. Therefore, the loop condition should be > and not >=. If len_src is 1, then we should flip the 1st byte and pack the 2nd. Since len_src is already decremented before the loop, the first condition should be >=, and not >. Likewise for len_src == 2 and the second condition. Signed-off-by: Pavel Zbitskiy <pavel.zbitskiy@gmail.com> Message-Id: <20180821025104.19604-7-pavel.zbitskiy@gmail.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-08-28target/s390x: add EX support for TRT and TRTRPavel Zbitskiy
Improves "b213c9f5: target/s390x: Implement TRTR" by introducing the intermediate functions, which are compatible with dx_helper type. Signed-off-by: Pavel Zbitskiy <pavel.zbitskiy@gmail.com> Message-Id: <20180821025104.19604-6-pavel.zbitskiy@gmail.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-08-28target/s390x: fix IPM polluting irrelevant bitsPavel Zbitskiy
Suppose psw.mask=0x0000000080000000, cc=2, r1=0 and we do "ipm 1". This command must touch only bits 32-39, so the expected output is r1=0x20000000. However, currently qemu yields r1=0x20008000, because irrelevant parts of PSW leak into r1 during program mask transfer. Signed-off-by: Pavel Zbitskiy <pavel.zbitskiy@gmail.com> Message-Id: <20180821025104.19604-5-pavel.zbitskiy@gmail.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-08-28target/s390x: fix CSST decoding and runtime alignment checkPavel Zbitskiy
CSST is defined as: C(0xc802, CSST, SSF, CASS, la1, a2, 0, 0, csst, 0) It means that the first parameter is handled by in1_la1(). in1_la1() fills addr1 field, and not in1. Furthermore, when extract32() is used for the alignment check, the third parameter should specify the number of trailing bits that must be 0. For FC these numbers are: FC=0 (word, 4 bytes): 2 FC=1 (double word, 8 bytes): 3 FC=2 (quad word, 16 bytes): 4 For SC these numbers correspond to the size: SC=0: 0 SC=1: 1 SC=2: 2 SC=3: 3 SC=4: 4 Signed-off-by: Pavel Zbitskiy <pavel.zbitskiy@gmail.com> Message-Id: <20180821025104.19604-4-pavel.zbitskiy@gmail.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-08-28tests/tcg: add a simple s390x testPavel Zbitskiy
Copied from alpha. Signed-off-by: Pavel Zbitskiy <pavel.zbitskiy@gmail.com> Message-Id: <20180821025104.19604-2-pavel.zbitskiy@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-07-31tests: add check_invalid_maps to test-mmapAlex Bennée
This adds a test to make sure we fail properly for a 0 length mmap. There are most likely other failure conditions we should also check. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Cc: umarcor <1783362@bugs.launchpad.net> Message-Id: <20180730134321.19898-3-alex.bennee@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-07-24tests/tcg: remove runcom testAlex Bennée
The combination of being rather esoteric and needing to support mmap @ 0 means this only ever worked under translation. It has now regressed even further and is no longer useful. Kill it. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-20tests: add top-level make dependency for docker buildsAlex Bennée
One problem with satisfying your docker dependencies in a sub-make it you might end up trying to satisfy the dependency multiple times. This is especially a problem with debian-sid based cross compilers and CI setups. We solve this by doing a docker build pass at the top level before any sub-makes are called. We still need to satisfy dependencies in the Makefile.target call so people can run tests from individual target directories. We introduce a new Makefile.probe which gets called for each PROBE_TARGET and allows us to build up the list. It does require multiply including config-target.mak which shouldn't cause any issues as it shouldn't define anything that clashes with config-host.mak. However we undefine a few key variables each time around. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2018-06-20tests/tcg/i386: extend timeout for runcom testAlex Bennée
The Travis hardware can be a little slow and the runcom test is fairly heavy in calculating pi. Lets double the timeout so we don't trip up during CI by mistake. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2018-06-20tests/tcg: override runners for broken testsAlex Bennée
To get a clean run of check-tcg these tests are currently skipped: - hello-mips for mips - linux-test for sparc Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-06-20tests/tcg: add run, diff, and skip helper macrosAlex Bennée
As we aren't using the default runners for all the test cases it is easy to miss out things like timeouts. To help with this we add some helpers and use them so we only need to make core changes in one place. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-06-20Makefile.target: add (clean-/build-)guest-tests targetsAlex Bennée
Now all the build infrastructure is in place we can build tests for each guest that we support. That support mainly depends on having cross compilers installed or docker setup. To keep all the logic for that together we put the rules in tests/tcg/Makefile.include and include it from the main Makefile.target. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-06-20tests/tcg/Makefile: update to be called from Makefile.targetAlex Bennée
This make is now invoked from each individual target make with the appropriate CC and EXTRA_CFLAGS set for each guest. It then includes additional Makefile.targets from: - tests/tcg/multiarch (always) - tests/tcg/$(TARGET_BASE_ARCH) (if available) - tests/tcg/$(TARGET_NAME) The order is important as the later Makefile's may want to suppress TESTS from its base arch profile. Each included Makefile.target is responsible for adding TESTS as well as defining any special build instructions for individual tests. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-06-20tests/tcg: enable building for PowerPCAlex Bennée
Now we have restored debian-image-powerpc-cross using Debian SID compilers we can build for 32 bit powerpc. Although PPC32 supports a range of pages sizes currently only 4k works so the others are commented out for now. We can also merge the ppc64 support under the base architecture directory to avoid too much proliferation of directories. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>