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2019-03-12tests/tcg/arm: account for pauth randomnessAlex Bennée
Pointer authentication isn't guaranteed to always detect a clash between different keys. Take this into account in the test by running several times and checking the percentage hit rate of the test. Cc: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-03-12tests/tcg/i386: add memory test to exercise softmmuAlex Bennée
This is a simple test to check various access patterns to memory including unaligned access. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-03-12tests/tcg/i386: add system mode Hello World testAlex Bennée
This introduces the build framework for simple i386 system tests. The first test is the eponymous "Hello World" which simply outputs the text on the serial port and then exits. I've included the framework for x86_64 but it is not in this series as it is a work in progress. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-03-12tests/tcg: provide a minilib for system testsAlex Bennée
We will likely want a few common functions to make up for the fact we don't have a libc and we don't want to feel like we are programming by banging rocks together. I've purloined the printf function from: https://git.virtualopensystems.com/dev/tcg_baremetal_tests Although I have tweaked the names to avoid confusing GCC about clashing with builtins. Cc: Alexander Spyridakis <a.spyridakis@virtualopensystems.com> Cc: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-03-12tests/tcg: enable cris base user-mode testsAlex Bennée
This converts the existing Makefile into a Makefile.target and updates it so it can be called by the tcg build system. The original Makefile didn't set -cpu except for the v17 tests however that has broken (I assume because linux-user is a "max" cpu) so here I force it to be crisv17. I've also replicated the GNU simulator targets (run-FOO-on-sim). Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-03-12tests/tcg/cris: align mul operationsAlex Bennée
To avoid: Error: dangerous MULS/MULU location; give it higher alignment Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-03-12tests/tcg/cris: comment out the ccs testAlex Bennée
Evidently upstream gcc doesn't like this opcode. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-03-12tests/tcg: split cris tests into bare and libc directoriesAlex Bennée
Bare tests are standalone assembly tests that don't require linking to any libc and hence can be built with kernel only compilers. The libc tests need a compiler capable of building properly linked userspace binaries. As we don't have such a cross compiler at the moment we won't be building those tests. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-03-12tests/tcg/cris: cleanup sys.cAlex Bennée
This is a mini library which provides helper functions to the tests which are all currently written in assembly. A bunch of minor changes: - removed libc related headers (fedora-cris-cross is a system compiler) - re-organised the functions to avoid forward declarations - cleaned up brace usage - restored exit for _fail case - removed tabs and fixed indentation Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-03-12tests/tcg/arm: add ARMv6-M UNDEFINED 32-bit instruction testStefan Hajnoczi
Test that 32-bit instructions declared UNDEFINED in the ARMv6-M Reference Manual really do raise an exception. Also test that the 6 32-bit instructions defined in the ARMv6-M Reference Manual do not raise an exception. Based-on: <20181029194519.15628-1-stefanha@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20181129185113.30353-1-stefanha@redhat.com> [AJB: integrated into system tests] Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-03-12tests/tcg/xtensa: enable system testsAlex Bennée
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-03-12tests/docker: add debian-xtensa-cross imagePhilippe Mathieu-Daudé
Xtensa cpu supported: - dc232b - dc233c - csp Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-03-12tests/tcg/mips: fix hello-mips compilationAlex Bennée
The compilation flags for proper building are in the source tree. We also fix exit to 0 so the result is counted as a success. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-03-12tests/tcg: add gdb runner variantAlex Bennée
With this you can launch a test in gdb with: cd $(BUILD)/tests make -f $(SRC)/tests/tcg/Makefile gdb-$(TEST_NAME) Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-03-12tests/tcg: split run-test into user and system variantsAlex Bennée
We can't rely on shell redirect magic to get things right so lets setup a common output chardev that is expecting to write to files. As we have split run-test up we might as well move the default monitor bits into the call. Finally a little make sophistry is required to correctly quote $(COMMA) and as we don't inherit common rules we have our own little copy here. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2019-03-12tests/tcg: add QEMU_OPT option for test runnerAlex Bennée
This will allow tests to modify the QEMU invocation with for example different -cpu stazas without having to define a whole new set of runner types. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-03-12tests/tcg: add softmmu awareness to MakefileAlex Bennée
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-03-11target/mips: Add tests for a variety of MSA integer subtract instructionsMateja Marjanovic
Add tests for a variety of MSA integer subtract instructions. Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1551964929-17845-6-git-send-email-mateja.marjanovic@rt-rk.com>
2019-03-11target/mips: Add tests for a variety of MSA integer multiply instructionsMateja Marjanovic
Add tests for a variety of MSA integer multiply instructions. Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1551964929-17845-5-git-send-email-mateja.marjanovic@rt-rk.com>
2019-03-11target/mips: Add tests for a variety of MSA integer dot product instructionsMateja Marjanovic
Add tests for a variety of MSA integer dot product instructions. Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1551964929-17845-4-git-send-email-mateja.marjanovic@rt-rk.com>
2019-03-11target/mips: Add tests for a variety of MSA integer divide instructionsMateja Marjanovic
Add tests for a variety of MSA integer divide instructions. Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1551964929-17845-3-git-send-email-mateja.marjanovic@rt-rk.com>
2019-03-11target/mips: Add tests for a variety of MSA integer average instructionsMateja Marjanovic
Add tests for a variety of MSA integer average instructions. Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1551964929-17845-2-git-send-email-mateja.marjanovic@rt-rk.com>
2019-03-11tests/tcg: target/mips: Rename two header files for consistencyAleksandar Markovic
Rename two header files for consistency and clarity. Do all other changes to accommodate new names. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <amarkovic@wavecomp.com> Message-Id: <1551981716-30664-3-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-11tests/tcg: target/mips: Correct preambles of test source filesAleksandar Markovic
Correct preambles of test source files. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <amarkovic@wavecomp.com> Message-Id: <1551981716-30664-2-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05target/mips: Add tests for integer add MSA instruction groupMateja Marjanovic
These are the regression tests for integer addition MSA instruction - various flavors of instruction add (ADD, ADDS, HADD,...). Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1551718283-4487-3-git-send-email-mateja.marjanovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add tests for MSA pack instructionsAleksandar Markovic
Add tests for MSA pack instructions. This includes following instructions: * PCKEV.B - pack even (bytes) * PCKEV.H - pack even (halfwords) * PCKEV.W - pack even (words) * PCKEV.D - pack even (doublewords) * PCKOD.B - pack odd (bytes) * PCKOD.H - pack odd (halfwords) * PCKOD.W - pack odd (words) * PCKOD.D - pack odd (doublewords) * VSHF.B - data preserving shuffle (bytes) * VSHF.H - data preserving shuffle (halfwords) * VSHF.W - data preserving shuffle (words) * VSHF.D - data preserving shuffle (doublewords) Each test consists of 80 test cases, so altogether there are 960 test cases. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-15-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add tests for MIPS64R6 int multiply instructionsAleksandar Markovic
Add tests for MIPS64R6 integer multiply instructions: MUL, MUH, MULU, MUHU, DMUL, DMUH, DMULU, and DMUHU. MUH and MUHU require 64 bit inputs in the form of 64-bit sign-extended 32-bit inputs. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-14-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add tests for MIPS64R6 shift instructionsAleksandar Markovic
Add tests for MIPS64R6 shift instructions: SLLV, SRLV, SRAV, DSLLV, DSRLV, and DSRAV. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-13-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add tests for MIPS64R6 bit count instructionsAleksandar Markovic
Add tests for MIPS64R6 bit count instructions: CLO, CLZ, DCLO, and DCLZ. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-12-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add tests for MIPS64R6 bit swap instructionsAleksandar Markovic
Add tests for MIPS64R6 bit swap instructions: BITSWAP and DBITSWAP. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-11-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add tests for MIPS64R6 logic instructionsAleksandar Markovic
Add tests for MIPS64R6 logic instructions: AND, NOR, OR, and XOR. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-10-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add wrappers for some MIPS64R6 instructionsAleksandar Markovic
Add wrappers for some MIPS64R6 instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-9-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Extend functionality of MSA wrapper macrosAleksandar Markovic
Add macros that will allow testing cases when one of the source registers is identical to the destination register. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-8-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Fix test utilities for 128-bit testsAleksandar Markovic
Add "static" and "const" modifiers where appropriate, and fix other minor issues. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-7-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add test utilities for 64-bit testsAleksandar Markovic
Add test utilities for 64-bit tests. Some of MIPS64R6 instructions require 64-bit inputs to be 32-bit integers sign-extedned to 64 bits, hence the need for sets of such inputs. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-6-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add test utilities for 32-bit testsAleksandar Markovic
Add test utilities for 32-bit tests. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-5-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add wrappers for various MSA instructionsAleksandar Markovic
Add wrappers for various MSA integer instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-4-git-send-email-aleksandar.markovic@rt-rk.com>
2019-02-28Merge remote-tracking branch 'remotes/xtensa/tags/20190228-xtensa' into stagingPeter Maydell
target/xtensa: FLIX support, various fixes and test improvements - add FLIX (flexible length instructions extension) support; - make testsuite runnable on wider range of xtensa cores; - add floating point opcode tests; - don't add duplicate 'static' in import_core.sh script; - fix undefined opcodes detection in test_mmuhifi_c3 overlay. # gpg: Signature made Thu 28 Feb 2019 12:53:23 GMT # gpg: using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044 # gpg: issuer "jcmvbkbc@gmail.com" # gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown] # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" [full] # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" [full] # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20190228-xtensa: (40 commits) tests/tcg/xtensa: add FPU2000 coprocessor tests tests/tcg/xtensa: add FP1 group tests tests/tcg/xtensa: add FP0 group conversion tests tests/tcg/xtensa: add FP0 group arithmetic tests tests/tcg/xtensa: add LSCI/LSCX group tests tests/tcg/xtensa: add test for FLIX tests/tcg/xtensa: conditionalize MMU-related tests tests/tcg/xtensa: conditionalize windowed register tests tests/tcg/xtensa: conditionalize and fix s32c1i tests tests/tcg/xtensa: fix SR tests for big endian configs tests/tcg/xtensa: conditionalize and expand SR tests tests/tcg/xtensa: conditionalize timer/CCOUNT tests tests/tcg/xtensa: conditionalize interrupt tests tests/tcg/xtensa: add straightforward conditionals tests/tcg/xtensa: conditionalize cache option tests tests/tcg/xtensa: conditionalize debug option tests tests/tcg/xtensa: enable boolean tests tests/tcg/xtensa: fix endianness issues in test_b tests/tcg/xtensa: don't use optional opcodes in generic code tests/tcg/xtensa: support configs with LITBASE ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-28tests/tcg/xtensa: add FPU2000 coprocessor testsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add FP1 group testsMax Filippov
Test comparisons and conditional move operations. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add FP0 group conversion testsMax Filippov
Test conversions for normal, NaN and Inf arguments. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add FP0 group arithmetic testsMax Filippov
Test arithmetic operations for normal, NaN and Inf arguments. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add LSCI/LSCX group testsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: add test for FLIXMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize MMU-related testsMax Filippov
Make MMU-related tests conditional on the presence of MMUv2 option. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize windowed register testsMax Filippov
Make windowed register tests conditional on the presence of this option. Fix tests to work correctly for both 32 and 64 physical registers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize and fix s32c1i testsMax Filippov
Make s32c1i tests conditional on the presence of this option. Initialize ATOMCTL SR when it's present to allow RCW transactions on uncached memory. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: fix SR tests for big endian configsMax Filippov
SR tests generate instructions that the assembler does not recognize and thus must take care about configuration endianness. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize and expand SR testsMax Filippov
Make tests for specific special registers conditional on the presence of the options that add these registers and test that the registers are not accessible otherwise. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize timer/CCOUNT testsMax Filippov
Make timer/CCOUNT tests conditional on the presence of timer option and number of configured timers. Don't use hard coded interrupt levels for timers, use configured values. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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