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2018-03-26target/xtensa: fix timers testMax Filippov
The value of CCOUNT special register is calculated as time elapsed since CCOUNT == 0 multiplied by the core frequency. In icount mode time increment between consecutive instructions that don't involve time warps is constant, but unless the result of multiplication of this constant by the core frequency is a whole number the CCOUNT increment between these instructions may not be constant. E.g. with icount=7 each instruction takes 128ns, with core clock of 10MHz CCOUNT values for consecutive instructions are: 502: (128 * 502 * 10000000) / 1000000000 = 642.56 503: (128 * 503 * 10000000) / 1000000000 = 643.84 504: (128 * 504 * 10000000) / 1000000000 = 645.12 I.e.the CCOUNT increments depend on the absolute time. This results in varying CCOUNT differences for consecutive instructions in tests that involve time warps and don't set CCOUNT explicitly. Change frequency of the core used in tests so that clock cycle takes exactly 64ns. Change icount power used in tests to 6, so that each instruction takes exactly 1 clock cycle. With these changes CCOUNT increments only depend on the number of executed instructions and that's what timer tests expect, so they work correctly. Longer story: http://lists.nongnu.org/archive/html/qemu-devel/2018-03/msg04326.html Cc: Pavel Dovgaluk <Pavel.Dovgaluk@ispras.ru> Cc: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-01-09target/xtensa: tests: fix memctl SR testMax Filippov
memctl SR is not available on dc232b, as it was introduced in more recent hardware release. Now that this information is available through the libisa the test fails. Fix the test. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-15target/xtensa: tests: clean up interrupt testsMax Filippov
Don't use hardcoded software interrupt masks, use XCHAL macros. Mask off timer interrupt bits that are not checked for. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-15target/xtensa: tests: add memctl testMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-15target/xtensa: tests: add ccount write testsMax Filippov
Check that CCOUNT SR is writable and that CCOMPARE timers are updated when CCOUNT is written to. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-15target/xtensa: tests: replace hardcoded interrupt masksMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-15target/xtensa: tests: fix timer testsMax Filippov
Don't expect that CCOUNT increments are equal to the number of executed instructions. Verify that timer interrupt does not fire before the programmed CCOMPARE value and does fire after. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-15target/xtensa: tests: run tests with icountMax Filippov
Timer tests expect certain determinism in CCOUNT updates and timer interrupts firing. Run QEMU with -icount to get deterministic results. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-12-20Move target-* CPU file into a target/ folderThomas Huth
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [cris&microblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>
2016-07-12Use #include "..." for our own headers, <...> for othersMarkus Armbruster
Tracked down with an ugly, brittle and probably buggy Perl script. Also move includes converted to <...> up so they get included before ours where that's obviously okay. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Tested-by: Eric Blake <eblake@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-12-17target-xtensa: test cross-page opcodeMax Filippov
Alter cross-page TB test to also test cross-page opcode. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-11-10target-xtensa: add entry overflow testMax Filippov
Check that entry instruction raises window overflow exception when PS.CALLINC points to live registers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-11-03target-xtensa: tests: pre-process tests linker scriptMax Filippov
Xtensa cores have configurable interrupt vectors and endiannes. This information is needed to link executable images correctly for a specific core configuration. Instead of hard-coding dc232 defaults pull endianness, number of high-priority interrupts and location of vectors from the core configuration and pass it through the C preprocessor. While at it clean up tabs and align the initial stack on 16 bytes. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-05-26target-xtensa: add tests for cross-page TBMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-05-26target-xtensa: completely clean TLB between MMU testsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-24target-xtensa: add basic tests for cache opcodesMax Filippov
Test that non-locking prefetch operations don't cause exceptions on missing TLB and that other 'hit' cache operations do. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-24target-xtensa: allow using core configuration in testsMax Filippov
Add path to the core configuration directory to test build command and replace .include asm directive with #include to enable preprocessing. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-24target-xtensa: add overridable test_init macroMax Filippov
Some test suites, like MMU, need per-test initialization. Don't make them redefine test macro, add test_init for that purpose. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2013-07-29tests/tcg/xtensa: Fix out-of-tree buildAndreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2013-07-29target-xtensa: add extui unit testMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2012-12-08target-xtensa: add s32c1i unit testsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08target-xtensa: add SR accessibility unit testsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-09target-xtensa: add MMU pagewalking testsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-21target-xtensa: add tests for LOOPNEZ and LOOPGTZMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-14target-xtensa: add test for IBREAK invalidationMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-14target-xtensa: add tests for LBEG/LEND invalidationMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-14target-xtensa: improve unit tests debuggingMax Filippov
- add testcase announcement; - add global symbols for individual tests; - add host-debug-* makefile target. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2012-02-20target-xtensa: add breakpoint testsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2012-01-12tests: mv tests/* -> tests/tcgAnthony Liguori
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>