aboutsummaryrefslogtreecommitdiff
path: root/tests/tcg/xtensa/test_sr.S
AgeCommit message (Collapse)Author
2019-02-28tests/tcg/xtensa: fix SR tests for big endian configsMax Filippov
SR tests generate instructions that the assembler does not recognize and thus must take care about configuration endianness. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-02-28tests/tcg/xtensa: conditionalize and expand SR testsMax Filippov
Make tests for specific special registers conditional on the presence of the options that add these registers and test that the registers are not accessible otherwise. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-01-09target/xtensa: tests: fix memctl SR testMax Filippov
memctl SR is not available on dc232b, as it was introduced in more recent hardware release. Now that this information is available through the libisa the test fails. Fix the test. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-15target/xtensa: tests: add memctl testMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-24target-xtensa: allow using core configuration in testsMax Filippov
Add path to the core configuration directory to test build command and replace .include asm directive with #include to enable preprocessing. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2012-12-08target-xtensa: add SR accessibility unit testsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>