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2014-11-03target-xtensa: tests: pre-process tests linker scriptMax Filippov
Xtensa cores have configurable interrupt vectors and endiannes. This information is needed to link executable images correctly for a specific core configuration. Instead of hard-coding dc232 defaults pull endianness, number of high-priority interrupts and location of vectors from the core configuration and pass it through the C preprocessor. While at it clean up tabs and align the initial stack on 16 bytes. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2012-01-12tests: mv tests/* -> tests/tcgAnthony Liguori
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>