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2023-09-29tests/tcg: Reset result register after each testBastian Koppelmann
some insns use the result register implicitly as an input. Thus, we could end up with data from the previous insn spilling over. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230913105326.40832-4-kbastian@mail.uni-paderborn.de>
2023-09-28tests/tcg/tricore: Extended and non-extened regs now matchBastian Koppelmann
RSx for d regs and e regs now use the same numbering. This makes sure that mixing d and e registers in an insn test will not overwrite data between registers. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230913105326.40832-2-kbastian@mail.uni-paderborn.de>
2023-09-28target/tricore: Swap src and dst reg for RCRR_INSERTBastian Koppelmann
Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-10-kbastian@mail.uni-paderborn.de>
2023-09-28target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0Bastian Koppelmann
we would crash if width was 0 for these insns, as tcg_gen_deposit() is undefined for that case. For TriCore, width = 0 is a mov from the src reg to the dst reg, so we special case this here. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-9-kbastian@mail.uni-paderborn.de>
2023-09-28target/tricore: Implement hptof insnBastian Koppelmann
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1667 Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-8-kbastian@mail.uni-paderborn.de>
2023-09-28target/tricore: Implement ftohp insnBastian Koppelmann
reported in https://gitlab.com/qemu-project/qemu/-/issues/1667 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-7-kbastian@mail.uni-paderborn.de>
2023-09-28target/tricore: Implement FTOU insnBastian Koppelmann
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-5-kbastian@mail.uni-paderborn.de>
2023-09-28target/tricore: Implement CRCN insnBastian Koppelmann
reported in https://gitlab.com/qemu-project/qemu/-/issues/1667 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230828112651.522058-3-kbastian@mail.uni-paderborn.de>
2023-06-07tests/tcg/tricore: Uses label for memory addressesBastian Koppelmann
the linker might rearrange sections, so lets reference memory by label name instead of addr + off. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230526061946.54514-3-kbastian@mail.uni-paderborn.de>
2023-06-07tests/tcg/tricore: Move asm tests into 'asm' directoryBastian Koppelmann
this seperates these tests from the upcoming tests written in C. Also rename the compiled test to 'test_<foo>.asm.tst'. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230526061946.54514-2-kbastian@mail.uni-paderborn.de>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-16 13:13:10 +0000