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2019-08-19target/mips: tests/tcg: Add optional printing of more detailed failure infoAleksandar Markovic
There is a need for printing input and output data for failure cases, for debugging purpose. This is achieved by this patch, and only if a preprocessor constant is manually set to 1. (Assumption is that the need for such printout is relatively rare.) Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1566216496-17375-37-git-send-email-aleksandar.markovic@rt-rk.com>
2019-07-02tcg/tests: target/mips: Amend MSA fixed point multiply testsAleksandar Markovic
Amend MSA fixed point multiply tests: add tests for MADD_Q.H, MADD_Q.W, MADDR_Q.H, MADDR_Q.W, MSUB_Q.H, MSUB_Q.W, MSUBR_Q.H and MSUBR_Q.W. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1562068213-11307-2-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26tests/tcg: target/mips: Amend tests for MSA int multiply instructionsAleksandar Markovic
Amend tests for MSA int multiply instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-5-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26tests/tcg: target/mips: Amend tests for MSA int dot product instructionsAleksandar Markovic
Add tests for instructions whose result depends on the value in destination register (prior to instruction execution). Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-4-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26tests/tcg: target/mips: Add tests for MSA move instructionsAleksandar Markovic
Add tests for MSA move instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-3-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26tests/tcg: target/mips: Add tests for MSA bit move instructionsAleksandar Markovic
Add tests for MSA bit move instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-2-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-21tests/tcg: target/mips: Amend tests for MSA pack instructionsAleksandar Markovic
Add tests for cases when destination register is the same as one of source registers. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561031359-6727-3-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-21tests/tcg: target/mips: Include isa/ase and group name in test outputAleksandar Markovic
For better appearance and usefullnes, include ISA/ASE name and instruction group name in the output of tests. For example, all this data will be displayed for FMAX_A.W test: | MSA | Float Max Min | FMAX_A.W | | PASS: 80 | FAIL: 0 | elapsed time: 0.16 ms | (the data will be displayed in one row; they are presented here in two rows not to exceed the width of the commit message) Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561031359-6727-2-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-07tests/tcg: target/mips: Add utility function reset_msa_registers()Aleksandar Markovic
Add function reset_msa_registers() and utilize it in each MSA test. This is needed to ensure independency of test results on the state of MSA registers before test execution. This also allows for correction of tests for VSHF* instructions, that are now independent on the previous state of MSA registers. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1559838440-9866-9-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-07tests/tcg: target/mips: Amend and rearrange MSA wrappersAleksandar Markovic
Amend and rearrange MSA wrappers to follow the same organization as in MSA tests. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1559838440-9866-6-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-01target/mips: Amend and cleanup MSA TCG testsAleksandar Markovic
Add missing bits and peaces of the tests of the emulation of certain MSA (non-immediate variants): some tests were missing two last cases; some instructions were missing wrappers; some test included wrong headers; some tests were missing altogether; updated some copywright preambles; do several other minor cleanups. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1555699081-24577-4-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-11tests/tcg: target/mips: Rename two header files for consistencyAleksandar Markovic
Rename two header files for consistency and clarity. Do all other changes to accommodate new names. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <amarkovic@wavecomp.com> Message-Id: <1551981716-30664-3-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-11tests/tcg: target/mips: Correct preambles of test source filesAleksandar Markovic
Correct preambles of test source files. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <amarkovic@wavecomp.com> Message-Id: <1551981716-30664-2-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add wrappers for some MIPS64R6 instructionsAleksandar Markovic
Add wrappers for some MIPS64R6 instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-9-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Extend functionality of MSA wrapper macrosAleksandar Markovic
Add macros that will allow testing cases when one of the source registers is identical to the destination register. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-8-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Fix test utilities for 128-bit testsAleksandar Markovic
Add "static" and "const" modifiers where appropriate, and fix other minor issues. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-7-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add test utilities for 64-bit testsAleksandar Markovic
Add test utilities for 64-bit tests. Some of MIPS64R6 instructions require 64-bit inputs to be 32-bit integers sign-extedned to 64 bits, hence the need for sets of such inputs. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-6-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add test utilities for 32-bit testsAleksandar Markovic
Add test utilities for 32-bit tests. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-5-git-send-email-aleksandar.markovic@rt-rk.com>
2019-03-05tests/tcg: target/mips: Add wrappers for various MSA instructionsAleksandar Markovic
Add wrappers for various MSA integer instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551800076-8104-4-git-send-email-aleksandar.markovic@rt-rk.com>
2019-02-27tests/tcg: target/mips: Add wrappers for MSA integer max/min instructionsAleksandar Markovic
Add wrappers for MSA integer max/min instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1551185735-17154-7-git-send-email-aleksandar.markovic@rt-rk.com>
2019-02-21tests/tcg: target/mips: Add wrappers for MSA integer compare instructionsAleksandar Markovic
Add wrappers for MSA integer compare instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add wrappers for MSA logic instructionsAleksandar Markovic
Add wrappers for MSA logic instructions. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add wrappers for MSA interleave instructionsAleksandar Markovic
Add wrappers for MSA interleave instructions. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add wrappers for MSA bit counting instructionsAleksandar Markovic
Add a header that contains wrappers around MSA instructions assembler invocations. For now, only bit counting instructions (NLOC, NLZC, and PCNT; each in four data format flavors) are supported. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add a header with test utilitiesAleksandar Markovic
Add a header that contains test utilities. For now, it contains only a function for checking and printing test results for bit counting and similar MSA instructions. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2019-02-14tests/tcg: target/mips: Add a header with test inputsAleksandar Markovic
The file tests/tcg/mips/include/test_inputs.h is planned to contain various test inputs. For now, it contains 64 128-bit pattern inputs (alternating groups od ones and zeroes) and 16 128-bit random inputs. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
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