Age | Commit message (Expand) | Author |
---|---|---|
2021-10-28 | Hexagon (target/hexagon) put writes to USR into temp until commit | Taylor Simpson |
2021-10-06 | Hexagon (target/hexagon) probe the stores in a packet at start of commit | Taylor Simpson |
2021-07-14 | tests/tcg: make test-mmap a little less aggressive | Alex Bennée |
2021-05-01 | Hexagon (target/hexagon) load into shifted register instructions | Taylor Simpson |
2021-05-01 | Hexagon (target/hexagon) load and unpack bytes instructions | Taylor Simpson |
2021-05-01 | Hexagon (target/hexagon) bit reverse (brev) addressing | Taylor Simpson |
2021-05-01 | Hexagon (target/hexagon) circular addressing | Taylor Simpson |
2021-05-01 | Hexagon (target/hexagon) add F2_sfrecipa instruction | Taylor Simpson |
2021-02-18 | Hexagon (tests/tcg/hexagon) TCG tests - floating point | Taylor Simpson |
2021-02-18 | Hexagon (tests/tcg/hexagon) TCG tests - atomics/load/store/misc | Taylor Simpson |
2021-02-18 | Hexagon (tests/tcg/hexagon) TCG tests - multiarch | Taylor Simpson |