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2022-02-09tcg/loongarch64: Support raising sigbus for user-onlyWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220106134238.3936163-1-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-09tcg/tci: Support raising sigbus for user-onlyRichard Henderson
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-09tcg/s390x: Support raising sigbus for user-onlyRichard Henderson
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-09tcg/riscv: Support raising sigbus for user-onlyRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-09tcg/ppc: Support raising sigbus for user-onlyRichard Henderson
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-09tcg/aarch64: Support raising sigbus for user-onlyRichard Henderson
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-09tcg/i386: Support raising sigbus for user-onlyRichard Henderson
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-09tcg/loongarch64: Fix fallout from recent MO_Q renamingWANG Xuerui
Apparently we were left behind; just renaming MO_Q to MO_UQ is enough. Fixes: fc313c64345453c7 ("exec/memop: Adding signedness to quad definitions") Signed-off-by: WANG Xuerui <git@xen0n.name> Message-Id: <20220206162106.1092364-1-i.qemu@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-04cpuid: use unsigned for max cpuidMichael S. Tsirkin
__get_cpuid_max returns an unsigned value. For consistency, store the result in an unsigned variable. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Richard Henderson <rth@twiddle.net> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-01-08exec/memop: Adding signedness to quad definitionsFrédéric Pétrot
Renaming defines for quad in their various forms so that their signedness is now explicit. Done using git grep as suggested by Philippe, with a bit of hand edition to keep assignments aligned. Signed-off-by: Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20220106210108.138226-2-frederic.petrot@univ-grenoble-alpes.fr Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-01-04tcg/optimize: Fix folding of vector opsRichard Henderson
Bitwise operations are easy to fold, because the operation is identical regardless of element size. But add and sub need extra element size info that is not currently propagated. Fixes: 2f9f08ba43d Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/799 Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Register the JITWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-28-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement tcg_target_initWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-27-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement exit_tb/goto_tbWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-26-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement tcg_target_qemu_prologueWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-25-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st opsWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-24-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement simple load/store opsWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-23-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement tcg_out_callWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-22-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement setcond opsWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-21-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement br/brcond opsWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-20-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu opsWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-19-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement add/sub opsWANG Xuerui
The neg_i{32,64} ops is fully expressible with sub, so omitted for simplicity. Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-18-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement shl/shr/sar/rotl/rotr opsWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-17-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement clz/ctz opsWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-16-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement bswap{16,32,64} opsWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-15-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement deposit/extract opsWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-14-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc opsWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-13-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement sign-/zero-extension opsWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-12-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement goto_ptrWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-11-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement tcg_out_mov and tcg_out_moviWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-10-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement the memory barrier opWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-9-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Implement necessary relocation operationsWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-8-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Define the operand constraintsWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-7-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Add register names, allocation order and input/output setsWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-6-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Add generated instruction opcodes and encoding helpersWANG Xuerui
Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211221054105.178795-5-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-21tcg/loongarch64: Add the tcg-target.h fileWANG Xuerui
Support for all optional TCG ops are initially marked disabled; the bits are to be set in individual commits later. Signed-off-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211221054105.178795-4-git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-07tcg/arm: Reduce vector alignment requirement for NEONRichard Henderson
With arm32, the ABI gives us 8-byte alignment for the stack. While it's possible to realign the stack to provide 16-byte alignment, it's far easier to simply not encode 16-byte alignment in the VLD1 and VST1 instructions that we emit. Remove the assertion in temp_allocate_frame, limit natural alignment to the provided stack alignment, and add a comment. Resolves: https://bugzilla.redhat.com/show_bug.cgi?id=1999878 Reported-by: Richard W.M. Jones <rjones@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210912174925.200132-1-richard.henderson@linaro.org> Message-Id: <20211206191335.230683-2-richard.henderson@linaro.org>
2021-11-11tcg/s390x: Fix tcg_out_vec_op argument typeMiroslav Rezanina
Newly defined tcg_out_vec_op (34ef767609 tcg/s390x: Add host vector framework) for s390x uses pointer argument definition. This fails on gcc 11 as original declaration uses array argument: In file included from ../tcg/tcg.c:430: /builddir/build/BUILD/qemu-6.1.50/tcg/s390x/tcg-target.c.inc:2702:42: error: argument 5 of type 'const TCGArg *' {aka 'const long unsigned int *'} declared as a pointer [-Werror=array-parameter=] 2702 | const TCGArg *args, const int *const_args) | ~~~~~~~~~~~~~~^~~~ ../tcg/tcg.c:121:41: note: previously declared as an array 'const TCGArg[16]' {aka 'const long unsigned int[16]'} 121 | const TCGArg args[TCG_MAX_OP_ARGS], | ~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~ In file included from ../tcg/tcg.c:430: /builddir/build/BUILD/qemu-6.1.50/tcg/s390x/tcg-target.c.inc:2702:59: error: argument 6 of type 'const int *' declared as a pointer [-Werror=array-parameter=] 2702 | const TCGArg *args, const int *const_args) | ~~~~~~~~~~~^~~~~~~~~~ ../tcg/tcg.c:122:38: note: previously declared as an array 'const int[16]' 122 | const int const_args[TCG_MAX_OP_ARGS]); | ~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~ Fixing argument type to pass build. Signed-off-by: Miroslav Rezanina <mrezanin@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: David Hildenbrand <david@redhat.com> Message-Id: <20211027085629.240704-1-mrezanin@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-11tcg: Document ctpop opcodesRichard Henderson
Fixes: a768e4e99247 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/658 Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-11tcg/optimize: Add an extra cast to fold_extract2Richard Henderson
There is no bug, but silence a warning about computation in int32_t being assigned to a uint64_t. Reported-by: Coverity CID 1465220 Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02qapi: introduce x-query-opcount QMP commandDaniel P. Berrangé
This is a counterpart to the HMP "info opcount" command. It is being added with an "x-" prefix because this QMP command is intended as an ad hoc debugging tool and will thus not be modelled in QAPI as fully structured data, nor will it have long term guaranteed stability. The existing HMP command is rewritten to call the QMP command. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2021-11-02qapi: introduce x-query-jit QMP commandDaniel P. Berrangé
This is a counterpart to the HMP "info jit" command. It is being added with an "x-" prefix because this QMP command is intended as an ad hoc debugging tool and will thus not be modelled in QAPI as fully structured data, nor will it have long term guaranteed stability. The existing HMP command is rewritten to call the QMP command. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2021-10-28tcg/optimize: Propagate sign info for shiftingRichard Henderson
For constant shifts, we can simply shift the s_mask. For variable shifts, we know that sar does not reduce the s_mask, which helps for sequences like ext32s_i64 t, in sar_i64 t, t, v ext32s_i64 out, t allowing the final extend to be eliminated. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-28tcg/optimize: Propagate sign info for bit countingRichard Henderson
The results are generally 6 bit unsigned values, though the count leading and trailing bits may produce any value for a zero input. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-28tcg/optimize: Propagate sign info for setcondRichard Henderson
The result is either 0 or 1, which means that we have a 2 bit signed result, and thus 62 bits of sign. For clarity, use the smask_from_zmask function. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-28tcg/optimize: Propagate sign info for logical operationsRichard Henderson
Sign repetitions are perforce all identical, whether they are 1 or 0. Bitwise operations preserve the relative quantity of the repetitions. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-28tcg/optimize: Optimize sign extensionsRichard Henderson
Certain targets, like riscv, produce signed 32-bit results. This can lead to lots of redundant extensions as values are manipulated. Begin by tracking only the obvious sign-extensions, and converting them to simple copies when possible. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-28tcg/optimize: Use fold_xx_to_i for remRichard Henderson
Recognize the constant function for remainder. Suggested-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-28tcg/optimize: Use fold_xi_to_x for divRichard Henderson
Recognize the identity function for division. Suggested-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-28tcg/optimize: Use fold_xi_to_x for mulRichard Henderson
Recognize the identity function for low-part multiply. Suggested-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-20 05:07:33 +0000