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AgeCommit message (Expand)Author
2008-12-07Remove a few dyngen and dyngen related codeaurel32
2008-12-01arm: Don't potentially overwrite input registers in add2, sub2.balrog
2008-12-01Don't rely on ARM tcg_out_goto() generating just a single insn.balrog
2008-12-01Use libgcc __clear_cache to clean icache, when available.balrog
2008-11-29Fix alignment of 64bit argsmalc
2008-11-18Preliminary AIX supportmalc
2008-11-17TCG variable type checking.pbrook
2008-11-12Rename misnamed BACK_CHAIN_OFFSET to LR_OFFSETmalc
2008-11-12Avoid compiler warningmalc
2008-11-11Fix alignment problem with some 64bit load/store instructionsmalc
2008-11-04Mention output overlaps.pbrook
2008-11-03Fix rotri_i64 typo.pbrook
2008-11-03tcg-ops.h: add rotl/rotli and rotr/rotri TCG instructionsaurel32
2008-11-03tcg-op.h: reorder _i64 instructions common to 32- and 64-bit targetsaurel32
2008-11-0264-bit target subfi fix.pbrook
2008-11-02tcg-ops.h: add a subfi wrapperaurel32
2008-11-02tcg-ops.h: _i64 TCG immediate instructions cleanupaurel32
2008-10-26Fix undeclared symbol warnings from sparseblueswir1
2008-10-21TCG: add tcg_const_local_tl()aurel32
2008-10-21TCG: add logical operations found on alpha and powerpc processorsaurel32
2008-10-05Add some missing static and const qualifiers, reg_names only used if NDEBUG setblueswir1
2008-10-02Optimize 64 bit bswapmalc
2008-09-23Fix tcg_gen_concat32_i64 on 64-bit hosts.pbrook
2008-09-22Avoid clobbering input register in qemu_ld64+bswap+useronly casemalc
2008-09-21Add concat32_i64 and concat_tl_i64 opsblueswir1
2008-09-21Add concat_i32_i64 op.pbrook
2008-09-14Display TCGCond name in tcg dumper (original patch by Tristan Gingold)blueswir1
2008-09-13Use 64 bit loads for tlb addend only if addend size is 64 bitsblueswir1
2008-09-13Fix stack alignment on Sparc32 hostblueswir1
2008-09-07TCG: Use x86-64 zero extension instructions.pbrook
2008-09-07Implement TCG sign extension ops for x86-64.pbrook
2008-09-05Revert "TCG: enable debug"aurel32
2008-09-05TCG: enable debugaurel32
2008-08-30Fix some warnings that would be generated by gcc -Wredundant-declsblueswir1
2008-08-21Relax qemu_ld/st constraints for !SOFTMMU casemalc
2008-08-20Relax qemu_ld/st constraints for !SOFTMMU casemalc
2008-08-20Avoid clobbering input/aliased registers in !SOFTMMU+64bit+bswap casemalc
2008-08-20Clear the upper 32 bits of addr_reg in TARGET_LONG_BITS == 32 casemalc
2008-08-20Move tcg_out_tlb_read into #ifdef CONFIG_SOFTMMU block to avoid compiler warningmalc
2008-08-17Fix some warnings that would be generated by gcc -Wmissing-prototypesblueswir1
2008-08-17Fix 64 bit constant generationblueswir1
2008-08-17Fix 32 bit address overflowblueswir1
2008-08-17Restore AREG0 after callsblueswir1
2008-08-16Sparc code generator update (fix qemu_ld & qemu_st)blueswir1
2008-08-15Sparc code generator updateblueswir1
2008-08-03Account for MacOS X ABI reserved space in linkage area (Andreas Faerber)malc
2008-08-03Preliminary MacOS X on PPC32 supportmalc
2008-07-29On ppc32 make tb_set_jmp_target1 behave like it does on a ppc64malc
2008-07-28Immediate versions of some operationsmalc
2008-07-28Do not try handle "special" arguments of and/or/xor/shl/shr, upper level does itmalc
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