Age | Commit message (Expand) | Author |
2024-05-27 | tcg/loongarch64: Fill out tcg_out_{ld,st} for vector regs | Richard Henderson |
2024-04-09 | tcg: Add TCGContext.emit_before_op | Richard Henderson |
2024-04-09 | tcg/optimize: Do not attempt to constant fold neg_vec | Richard Henderson |
2024-03-29 | tcg/optimize: Fix sign_mask for logical right-shift | Richard Henderson |
2024-03-12 | tcg/aarch64: Fix tcg_out_brcond for test comparisons | Richard Henderson |
2024-03-12 | tcg/aarch64: Fix tcg_out_cmp for test comparisons | Richard Henderson |
2024-02-29 | tcg/optimize: fix uninitialized variable | Paolo Bonzini |
2024-02-29 | tcg/aarch64: Apple does not align __int128_t in even registers | Richard Henderson |
2024-02-13 | tcg/arm: Fix goto_tb for large translation blocks | Richard Henderson |
2024-02-05 | tcg/tci: Support TCG_COND_TST{EQ,NE} | Richard Henderson |
2024-02-05 | tcg/s390x: Support TCG_COND_TST{EQ,NE} | Richard Henderson |
2024-02-03 | tcg/s390x: Add TCG_CT_CONST_CMP | Richard Henderson |
2024-02-03 | tcg/s390x: Split constraint A into J+U | Richard Henderson |
2024-02-03 | tcg/ppc: Support TCG_COND_TST{EQ,NE} | Richard Henderson |
2024-02-03 | tcg/ppc: Add TCG_CT_CONST_CMP | Richard Henderson |
2024-02-03 | tcg/ppc: Tidy up tcg_target_const_match | Richard Henderson |
2024-02-03 | tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel | Richard Henderson |
2024-02-03 | tcg/ppc: Sink tcg_to_bc usage into tcg_out_bc | Richard Henderson |
2024-02-03 | tcg/sparc64: Support TCG_COND_TST{EQ,NE} | Richard Henderson |
2024-02-03 | tcg/sparc64: Pass TCGCond to tcg_out_cmp | Richard Henderson |
2024-02-03 | tcg/sparc64: Hoist read of tcg_cond_to_rcond | Richard Henderson |
2024-02-03 | tcg/i386: Use TEST r,r to test 8/16/32 bits | Paolo Bonzini |
2024-02-03 | tcg/i386: Improve TSTNE/TESTEQ vs powers of two | Richard Henderson |
2024-02-03 | tcg/i386: Support TCG_COND_TST{EQ,NE} | Richard Henderson |
2024-02-03 | tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp | Richard Henderson |
2024-02-03 | tcg/i386: Pass x86 condition codes to tcg_out_cmov | Richard Henderson |
2024-02-03 | tcg/arm: Support TCG_COND_TST{EQ,NE} | Richard Henderson |
2024-02-03 | tcg/arm: Split out tcg_out_cmp() | Richard Henderson |
2024-02-03 | tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX | Richard Henderson |
2024-02-03 | tcg/aarch64: Generate TBZ, TBNZ | Richard Henderson |
2024-02-03 | tcg/aarch64: Massage tcg_out_brcond() | Philippe Mathieu-Daudé |
2024-02-03 | tcg/aarch64: Support TCG_COND_TST{EQ,NE} | Richard Henderson |
2024-02-03 | tcg: Add TCGConst argument to tcg_target_const_match | Richard Henderson |
2024-02-03 | tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported | Richard Henderson |
2024-02-03 | tcg/optimize: Handle TCG_COND_TST{EQ,NE} | Richard Henderson |
2024-02-03 | tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2 | Richard Henderson |
2024-02-03 | tcg/optimize: Split out do_constant_folding_cond1 | Richard Henderson |
2024-02-03 | tcg/optimize: Split out arg_is_const_val | Richard Henderson |
2024-02-03 | tcg: Introduce TCG_TARGET_HAS_tst | Richard Henderson |
2024-02-03 | tcg: Introduce TCG_COND_TST{EQ,NE} | Richard Henderson |
2024-02-03 | tcg/loongarch64: Set vector registers call clobbered | Richard Henderson |
2024-01-29 | accel/tcg: Move perf and debuginfo support to tcg/ | Ilya Leoshkevich |
2024-01-23 | tcg/arm: Fix SIGILL in tcg_out_qemu_st_direct | Joseph Burt |
2024-01-23 | tcg/s390x: Fix encoding of VRIc, VRSa, VRSc insns | Richard Henderson |
2024-01-23 | tcg: Make the cleanup-on-error path unique | Samuel Tardieu |
2024-01-23 | tcg: Remove unreachable code | Samuel Tardieu |
2024-01-11 | tcg/ppc: Use new registers for LQ destination | Richard Henderson |
2024-01-11 | tcg/i386: use 8-bit OR or XOR for unsigned 8-bit immediates | Paolo Bonzini |
2024-01-11 | tcg/i386: convert add/sub of 128 to sub/add of -128 | Paolo Bonzini |
2023-12-31 | meson: remove config_targetos | Paolo Bonzini |