| Age | Commit message (Expand) | Author |
|---|
| 2021-06-19 | tcg/tci: Change encoding to uint32_t units | Richard Henderson |
| 2021-06-19 | tcg/tci: Remove tci_write_reg | Richard Henderson |
| 2021-06-19 | tcg/tci: Emit setcond before brcond | Richard Henderson |
| 2021-06-19 | tcg/tci: Reserve r13 for a temporary | Richard Henderson |
| 2021-06-19 | tcg/tci: Use ffi for calls | Richard Henderson |
| 2021-06-19 | tcg/tci: Move call-return regs to end of tcg_target_reg_alloc_order | Richard Henderson |
| 2021-06-19 | tcg/tci: Improve tcg_target_call_clobber_regs | Richard Henderson |
| 2021-06-19 | tcg: Build ffi data structures for helpers | Richard Henderson |
| 2021-06-19 | tcg: Add tcg_call_func | Richard Henderson |
| 2021-06-19 | tcg: Store the TCGHelperInfo in the TCGOp for call | Richard Henderson |
| 2021-06-19 | tcg: Add tcg_call_flags | Richard Henderson |
| 2021-06-19 | tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode | Richard Henderson |
| 2021-06-13 | tcg/arm: Fix tcg_out_op function signature | Jose R. Ziviani |
| 2021-06-13 | tcg: Introduce tcg_remove_ops_after | Richard Henderson |
| 2021-06-13 | tcg: Move tcg_init_ctx and tcg_ctx from accel/tcg/ | Richard Henderson |
| 2021-06-13 | tcg: When allocating for !splitwx, begin with PROT_NONE | Richard Henderson |
| 2021-06-13 | tcg: Merge buffer protection and guard page protection | Richard Henderson |
| 2021-06-13 | tcg: Round the tb_size default from qemu_get_host_physmem | Richard Henderson |
| 2021-06-13 | tcg: Sink qemu_madvise call to common code | Richard Henderson |
| 2021-06-13 | tcg: Return the map protection from alloc_code_gen_buffer | Richard Henderson |
| 2021-06-13 | tcg: Allocate code_gen_buffer into struct tcg_region_state | Richard Henderson |
| 2021-06-11 | tcg: Move in_code_gen_buffer and tests to region.c | Richard Henderson |
| 2021-06-11 | tcg: Tidy split_cross_256mb | Richard Henderson |
| 2021-06-11 | tcg: Tidy tcg_n_regions | Richard Henderson |
| 2021-06-11 | tcg: Rename region.start to region.after_prologue | Richard Henderson |
| 2021-06-11 | tcg: Replace region.end with region.total_size | Richard Henderson |
| 2021-06-11 | tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h | Richard Henderson |
| 2021-06-11 | tcg: Introduce tcg_max_ctxs | Richard Henderson |
| 2021-06-11 | accel/tcg: Pass down max_cpus to tcg_init | Richard Henderson |
| 2021-06-11 | tcg: Create tcg_init | Richard Henderson |
| 2021-06-11 | accel/tcg: Move alloc_code_gen_buffer to tcg/region.c | Richard Henderson |
| 2021-06-11 | tcg: Split out region.c | Richard Henderson |
| 2021-06-11 | tcg: Split out tcg_region_prologue_set | Richard Henderson |
| 2021-06-11 | tcg: Split out tcg_region_initial_alloc | Richard Henderson |
| 2021-06-11 | tcg: Remove error return from tcg_region_initial_alloc__locked | Richard Henderson |
| 2021-06-11 | tcg: Re-order tcg_region_init vs tcg_prologue_init | Richard Henderson |
| 2021-06-11 | meson: Split out tcg/meson.build | Richard Henderson |
| 2021-06-04 | tcg/arm: Implement TCG_TARGET_HAS_rotv_vec | Richard Henderson |
| 2021-06-04 | tcg/arm: Implement TCG_TARGET_HAS_roti_vec | Richard Henderson |
| 2021-06-04 | tcg/arm: Implement TCG_TARGET_HAS_shv_vec | Richard Henderson |
| 2021-06-04 | tcg/arm: Implement TCG_TARGET_HAS_bitsel_vec | Richard Henderson |
| 2021-06-04 | tcg/arm: Implement TCG_TARGET_HAS_minmax_vec | Richard Henderson |
| 2021-06-04 | tcg/arm: Implement TCG_TARGET_HAS_sat_vec | Richard Henderson |
| 2021-06-04 | tcg/arm: Implement TCG_TARGET_HAS_mul_vec | Richard Henderson |
| 2021-06-04 | tcg/arm: Implement TCG_TARGET_HAS_shi_vec | Richard Henderson |
| 2021-06-04 | tcg/arm: Implement andc, orc, abs, neg, not vector operations | Richard Henderson |
| 2021-06-04 | tcg/arm: Implement minimal vector operations | Richard Henderson |
| 2021-06-04 | tcg/arm: Implement tcg_out_dup*_vec | Richard Henderson |
| 2021-06-04 | tcg/arm: Implement tcg_out_mov for vector types | Richard Henderson |
| 2021-06-04 | tcg/arm: Implement tcg_out_ld/st for vector types | Richard Henderson |
