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2009-01-03tcg: remove tcg_global_reg2_new_hack()aurel32
This patch removes the unused tcg_global_reg2_new_hack() function, which was added in r4438 to work around a register shortage problem regarding dyngen. The only ever user of this function was removed in r4577. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6150 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-03TCG: Fix documentation of qemu_ld/st opsaurel32
The functions defined in tcg/tcg-op.h have no _i32 or _i64 suffix, qemu_ld64 and qemu_st64 were missing from the list, and there are no 'plain' qemu_ld/qemu_st ops. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6148 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-01tcg_temp_local_new should take no parameteraurel32
This patch removes useless type information in some calls to tcg_temp_local_new. It also removes the parameter from the macro declaration; if a target has to use a specific non-default size then it should use tcg_temp_local_new_{i32,i64}. Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6146 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-22Use the ARRAY_SIZE() macro where appropriate.malc
Change from v1: Avoid changing the existing coding style in certain files. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-14tcg: kill two warningsaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6029 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13TCG x86/x86-64: use move with zero-extend for loads/storesaurel32
Starting with version 4.3, gcc returns the result of a function in rax/eax/ax/al instead of rax/eax, depending of the return type. As a consequence we should use a zero extend moe in TCG loads/stores. See http://gcc.gnu.org/ml/gcc/2008-01/msg00052.html for more details. A big thanks to malc who founds the problem and wrote the x86 patch. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6011 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13Remove unnecessary trailing newlinesblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13Fix TARGET_LONG_BITS warning in TCGblueswir1
Looking at tcg/tcg.c:828, the bug that the warning indicated would show up as incorrect PC shown in log, only on 32 bit big endian host emulating a 64 bit target, -d op flag enabled. Now that dyngen is gone, the patch can be applied. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5998 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-10Introduce and use cache-utils.[ch]malc
Thanks to Segher Boessenkool and Holis Blanchard. AIX and Darwin cache inquiry: http://gcc.gnu.org/ml/gcc-patches/2007-08/msg00388.html Auxiliary vectors: http://manugarg.googlepages.com/aboutelfauxiliaryvectors git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5973 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Fix 64-bit targets compilation on ARM host.balrog
Only fix compilation, probably doesn't run. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5947 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Some cleanups after dyngen removalaurel32
1. hostregs_helper.h: fix comment 2. translate-all.c: rename dyngen_code(_search_pc) to tcg_gen_code(_search_pc) 3. tcg.c: - rename dyngen_table_op_count to tcg_table_op_count - no need to generate a log of dyngen ops generated - rename dyngen_code(_search_pc) to tcg_gen_code(_search_pc) 4. tcg.h: rename dyngen_code(_search_pc) to tcg_gen_code(_search_pc) Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5936 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Some cleanups after dyngen removalaurel32
this patch removes some now unused things after dyngen removal. 1. dyngen-exec.h: op_param, op _jmp and some associated macros are now unused; 2. Makefile.target: tcg-dyngen is not needed anymore 2. tcg/tcg-op.h, tcg/tcg-opc.h: gen-op.h is dead 3. tcg.c: - INDEX_op_end is now the first op - CONFIG_DYNGEN_OP is never defined 4. tcg.h: dyngen_op not needed anymore 5. exec-all.h: remove some ASM macros. Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5922 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Some fixes for TCG debuggingblueswir1
This fixes a few things after Paul's improvements for TCG debugging: - change TCGv_i64 field name to something different from TCGv_i32 - fix things in tcg that the above change made visible. Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5919 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Remove a few dyngen and dyngen related codeaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5914 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-01arm: Don't potentially overwrite input registers in add2, sub2.balrog
According to malc TCG will often genereate an add2/sub2/mul2 with low half of the output in the same register as high half of one of the inputs, so account for that. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5847 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-01Don't rely on ARM tcg_out_goto() generating just a single insn.balrog
Otherwise when tb_exit generates a jump beyond the pc-relative range, tcg_out_goto() spans two/three instructions and we load the tb return value from a wrong address. This is #ifdefed out currently because we take care for the jumps to be local. Problem spotted by Steffen Liebergeld. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5845 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-01Use libgcc __clear_cache to clean icache, when available.balrog
Calling the clear cache syscall directly generates an illegal instruction on some (armv4) kernels. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5843 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-29Fix alignment of 64bit argsmalc
Unbreaks sparc and mips64el. (Reported by Thiemo Seufer) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5815 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18Preliminary AIX supportmalc
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5732 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17TCG variable type checking.pbrook
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-12Rename misnamed BACK_CHAIN_OFFSET to LR_OFFSETmalc
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5711 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-12Avoid compiler warningmalc
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5710 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11Fix alignment problem with some 64bit load/store instructionsmalc
LD/STD/LWA require displacement to be multiple of 4, provide tcg_out_ldsta which checks the supplied displacement and falls back on indexed variant when the check fails. All uses of LD/STD/LWA outside of tcg_out_ldst appear to be safe. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5670 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-04Mention output overlaps.pbrook
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5619 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-03Fix rotri_i64 typo.pbrook
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5609 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-03tcg-ops.h: add rotl/rotli and rotr/rotri TCG instructionsaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5607 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-03tcg-op.h: reorder _i64 instructions common to 32- and 64-bit targetsaurel32
Use the same order as the _i32 version (pure code move). Suggested by Laurent Laurent Desnogues. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5606 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-0264-bit target subfi fix.pbrook
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5602 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-02tcg-ops.h: add a subfi wrapperaurel32
Add a subfi (subtract from immediate) wrapper, useful for the PPC target. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5599 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-02tcg-ops.h: _i64 TCG immediate instructions cleanupaurel32
Move addi_i64, muli_i64 and subi_i64 out of #if TCG_TARGET_REG_BITS as both implementations are strictly identical. Use the same optimisation (ie when imm == 0) for addi_i64 and subi_64 than the 32-bit version. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5598 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-26Fix undeclared symbol warnings from sparseblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-21TCG: add tcg_const_local_tl()aurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5504 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-21TCG: add logical operations found on alpha and powerpc processorsaurel32
- andc_i32/i64 t0, t1, t2 - eqv_i32/i64 t0, t1, t2 - nand_i32/i64 t0, t1, t2 - nor_i32/i64 t0, t1, t2 - orc_i32/i64 t0, t1, t2 Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5501 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-05Add some missing static and const qualifiers, reg_names only used if NDEBUG setblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5421 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-02Optimize 64 bit bswapmalc
Use rldimi instead of rldicr/or pair, saves us one instruction. Suggested by Hollis Blanchard. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5404 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-23Fix tcg_gen_concat32_i64 on 64-bit hosts.pbrook
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5306 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-22Avoid clobbering input register in qemu_ld64+bswap+useronly casemalc
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5287 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21Add concat32_i64 and concat_tl_i64 opsblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5282 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21Add concat_i32_i64 op.pbrook
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5280 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-14Display TCGCond name in tcg dumper (original patch by Tristan Gingold)blueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5208 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-13Use 64 bit loads for tlb addend only if addend size is 64 bitsblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5203 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-13Fix stack alignment on Sparc32 hostblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5202 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-07TCG: Use x86-64 zero extension instructions.pbrook
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5180 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-07Implement TCG sign extension ops for x86-64.pbrook
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5179 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-05Revert "TCG: enable debug"aurel32
This reverts commit 5166, commited by error. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5169 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-05TCG: enable debugaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5166 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30Fix some warnings that would be generated by gcc -Wredundant-declsblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-21Relax qemu_ld/st constraints for !SOFTMMU casemalc
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5038 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-20Relax qemu_ld/st constraints for !SOFTMMU casemalc
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5034 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-20Avoid clobbering input/aliased registers in !SOFTMMU+64bit+bswap casemalc
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5033 c046a42c-6fe2-441c-8c8c-71466251a162
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