aboutsummaryrefslogtreecommitdiff
path: root/tcg
AgeCommit message (Collapse)Author
2009-10-07tcg: improve output logAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-04tcg: allocate s->op_dead_iargs dynamicallyAurelien Jarno
Similarly to what is already done in tcg_liveness_analysis() when USE_LIVENESS_ANALYSIS is not set. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-04tcg: remove dead codeAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-04tcg/i386: add support for ext{8,16}u_i32 TCG opsAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-04tcg/x86_64: add support for ext{8,16,32}u_i{32,64} TCG opsAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-04tcg: add ext{8,16,32}u_i{32,64} TCG opsAurelien Jarno
Currently zero extensions ops are implemented by a and op with a constant. This is then catched in some backend, and replaced by a zero extension instruction. While this works well on RISC machines, this adds a useless register move on non-RISC machines. Example on x86: ext16u_i32 r1, r2 is translated into mov %eax,%ebx movzwl %bx, %ebx while the optimized version should be: movzwl %ax, %ebx This patch adds ext{8,16,32}u_i{32,64} TCG ops that can be implemented in the backends to avoid emitting useless register moves. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-30Revert part of 6692b043198d58a12317009edb98654c6839f043Aurelien Jarno
Committed by accident. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-30TCG: fix DEF2 macroAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-27tcg/i386: generates dec/inc instead of sub/add when possibleAurelien Jarno
We must take care that dec/inc do not compute CF, which is needed by add2/sub2. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-27tcg/i386: optimize and $0xff(ff), regAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-27tcg/x86_64: generated dec/inc instead of sub/add when possibleAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-27tcg/ppc: always use tcg_out_callmalc
Signed-off-by: malc <av1474@comtv.ru>
2009-09-26ARM back-end: Use sxt[bh] instructions for ext{8, 6}sLaurent Desnogues
This patch uses sxtb for ext8s_i32 and sxth for ext16s_i32 in ARM back-end. Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-25Suppress some variants of English in commentsStefan Weil
Replace surpress, supress by suppress. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-20Compile TCG runtime library only onceBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-09-16tcg: fix size of local variables in tcg_gen_bswap64_i64Stefan Weil
t0, t1 must be 64 bit values, not 32 bit. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-11X86_64: Use proper jumps/calls when displacement exceeds +-2Gmalc
Signed-off-by: malc <av1474@comtv.ru>
2009-09-06When targeting PPU use rlwinm instead of andi. if possiblemalc
andi. is microcoded and slow there. Signed-off-by: malc <av1474@comtv.ru>
2009-08-25ARM back-end: Fix encode_immLaurent Desnogues
the encode_imm function in tcg/arm/tcg-target.c lacks shift declaration. Laurent Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2009-08-22ARM back-end: Handle all possible immediates for ALU opsLaurent Desnogues
this patch handles all possible constants for immediate operand of ALU ops. I'm not very satisfied by the implementation. Laurent Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2009-08-22ARM back-end: Add TCG notLaurent Desnogues
this patch: - implements TCG not. Laurent Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2009-07-27rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-27rename DEBUG_TCG to CONFIG_DEBUG_TCGJuan Quintela
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-27change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION}Juan Quintela
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-21Fix CONFIG_PROFILERBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-20Fix rbase initializationmalc
Signed-off-by: malc <av1474@comtv.ru>
2009-07-18this patch improves the ARM back-end in the following way:Laurent Desnogues
- use movw/movt to load immediate values for ARMv7-A - implement add/sub/and/or/xor with immediate (only 8-bit) Laurent Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2009-07-18tcg: Fix tcg_gen_rotr_i64Aurelien Jarno
Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-07-18PPC 32/64 GUEST_BASE supportmalc
Signed-off-by: malc <av1474@comtv.ru>
2009-07-18Fix LHZX opcode valuemalc
Signed-off-by: malc <av1474@comtv.ru>
2009-07-17Userspace guest address offsettingJuan Quintela
Fix type in i386 tcg. Signed-off-by: Juan Quintela <quintela@redhat.com>
2009-07-17Userspace guest address offsettingPaul Brook
Re-implement GUEST_BASE support. Offset guest ddress space by default if the guest binary contains regions below the host mmap_min_addr. Implement support for i386, x86-64 and arm hosts. Signed-off-by: Riku Voipio <riku.voipio@iki.fi> Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-07-17ARM host fixesPaul Brook
Minor TCG cleanups and warning fixes for ARM hosts. Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-05-13Include assert.h from qemu-common.hPaul Brook
Include assert.h from qemu-common.h and remove other direct uses. cpu-all.h still need to include it because of the dyngen-exec.h hacks Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-04-16tcg: make sure NDEBUG is defined before including <assert.h>aurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7122 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-13Add a --enable-debug-tcg option to configureaurel32
This patch allows DEBUG_TCGV to be defined (and also prevents NDEBUG from being defined) when passing an option to the configure script. This should help to prevent any accidental changes that enable DEBUG_TCGV in tcg/tcg.h from being committed in future, and may help to encourage testing with DEBUG_TCGV enabled. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7105 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-11Remove reserved registers from tcg_target_reg_alloc_ordermalc
Noticed by Andreas Faerber git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7082 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-11Whack [LS]MWmalc
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7081 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-11Remove reserved registers from tcg_target_reg_alloc_ordermalc
Noticed by Andreas Faerber git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7080 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-07tcg/tcg.h: fix a few typosaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7024 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-06tcg: add a CONST flag to TCG helpersaurel32
A const function only reads its arguments and does not use TCG globals variables. Hence a call to such a function does not save TCG globals variabes back to their canonical location. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7008 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-06tcg: improve comment about pure functionsaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7007 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-05tcg/x86_64: optimize register allocation orderaurel32
The beginning of the register allocation order list on the TCG x86_64 target matches the list of clobbered registers. This means that when an helper is called, there is almost always clobbered registers that have to be spilled. The same way register %rsi and %rdi are at the top of the register allocation order list, while they can't be used for load/store operations. This means the data and/or address registers are very often %rsi and %rdi, and their values have to be spilled, and then moved back to another register. This patches changes to the allocation order to avoid those effects. It results in a 8% gain speed in qemu-x86_64 to compress a bzip2 file, and a 6% gain in qemu-system-mips64 to compile a small application. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7003 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-04Fix branches and TLB matches for 64 bit targetsblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6974 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-04Allocate space for static call args, increase stack frame size on Sparc64blueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6973 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-29tcg: fix _tl aliases for divu/remuaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6948 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-29tcg: add _tl aliases for div/divu/rem/remuaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6939 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-28tcg/README: fix description of bswap32_i32/i64aurel32
Thanks to Stuart Brady for the notice. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6920 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13tcg/x86_64: add bswap16_i{32,64} and bswap32_i64 opsaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6838 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13tcg/x86: add bswap16_i32 opsaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6837 c046a42c-6fe2-441c-8c8c-71466251a162
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-04 04:45:23 +0000