Age | Commit message (Expand) | Author |
2019-01-11 | qemu/queue.h: leave head structs anonymous unless necessary | Paolo Bonzini |
2018-12-26 | tcg: Improve call argument loading | Richard Henderson |
2018-12-26 | tcg: Record register preferences during liveness | Richard Henderson |
2018-12-26 | tcg: Add TCG_OPF_BB_EXIT | Richard Henderson |
2018-12-26 | tcg: Split out more subroutines from liveness_pass_1 | Richard Henderson |
2018-12-26 | tcg: Rename and adjust liveness_pass_1 helpers | Richard Henderson |
2018-12-26 | tcg: Reindent parts of liveness_pass_1 | Richard Henderson |
2018-12-26 | tcg: Dump register preference info with liveness | Richard Henderson |
2018-12-26 | tcg: Improve register allocation for matching constraints | Richard Henderson |
2018-12-26 | tcg: Add output_pref to TCGOp | Richard Henderson |
2018-12-26 | tcg: Add preferred_reg argument to tcg_reg_alloc_do_movi | Richard Henderson |
2018-12-26 | tcg: Add preferred_reg argument to temp_sync | Richard Henderson |
2018-12-26 | tcg: Add preferred_reg argument to temp_load | Richard Henderson |
2018-12-26 | tcg: Add preferred_reg argument to tcg_reg_alloc | Richard Henderson |
2018-12-26 | tcg: Add reachable_code_pass | Richard Henderson |
2018-12-26 | tcg: Reference count labels | Richard Henderson |
2018-12-26 | tcg: Add TCG_CALL_NO_RETURN | Richard Henderson |
2018-12-26 | tcg: Renumber TCG_CALL_* flags | Richard Henderson |
2018-12-26 | tcg/riscv: Add the target init code | Alistair Francis |
2018-12-26 | tcg/riscv: Add the prologue generation and register the JIT | Alistair Francis |
2018-12-26 | tcg/riscv: Add the out op decoder | Alistair Francis |
2018-12-26 | tcg/riscv: Add direct load and store instructions | Alistair Francis |
2018-12-26 | tcg/riscv: Add slowpath load and store instructions | Alistair Francis |
2018-12-26 | tcg/riscv: Add branch and jump instructions | Alistair Francis |
2018-12-26 | tcg/riscv: Add the add2 and sub2 instructions | Alistair Francis |
2018-12-26 | tcg/riscv: Add the out load and store instructions | Alistair Francis |
2018-12-26 | tcg/riscv: Add the extract instructions | Alistair Francis |
2018-12-26 | tcg/riscv: Add the mov and movi instruction | Alistair Francis |
2018-12-26 | tcg/riscv: Add the relocation functions | Alistair Francis |
2018-12-26 | tcg/riscv: Add the instruction emitters | Alistair Francis |
2018-12-26 | tcg/riscv: Add the immediate encoders | Alistair Francis |
2018-12-26 | tcg/riscv: Add support for the constraints | Alistair Francis |
2018-12-26 | tcg/riscv: Add the tcg target registers | Alistair Francis |
2018-12-26 | tcg/riscv: Add the tcg-target.h file | Alistair Francis |
2018-12-17 | tcg: Drop nargs from tcg_op_insert_{before,after} | Emilio G. Cota |
2018-12-17 | tcg/mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITS | Alistair Francis |
2018-12-17 | tcg: Add TCG_TARGET_HAS_MEMORY_BSWAP | Richard Henderson |
2018-12-17 | tcg/optimize: Optimize bswap | Richard Henderson |
2018-12-17 | tcg: Clean up generic bswap64 | Richard Henderson |
2018-12-17 | tcg: Clean up generic bswap32 | Richard Henderson |
2018-12-17 | tcg/i386: Add setup_guest_base_seg for FreeBSD | Richard Henderson |
2018-12-17 | tcg/i386: Precompute all guest_base parameters | Richard Henderson |
2018-12-17 | tcg/i386: Assume 32-bit values are zero-extended | Richard Henderson |
2018-12-17 | tcg/i386: Implement INDEX_op_extr{lh}_i64_i32 for 32-bit guests | Richard Henderson |
2018-12-17 | tcg/i386: Propagate is64 to tcg_out_qemu_ld_slow_path | Richard Henderson |
2018-12-17 | tcg/i386: Propagate is64 to tcg_out_qemu_ld_direct | Richard Henderson |
2018-12-17 | tcg/s390x: Return false on failure from patch_reloc | Richard Henderson |
2018-12-17 | tcg/ppc: Return false on failure from patch_reloc | Richard Henderson |
2018-12-17 | tcg/arm: Return false on failure from patch_reloc | Richard Henderson |
2018-12-17 | tcg/aarch64: Return false on failure from patch_reloc | Richard Henderson |