Age | Commit message (Expand) | Author |
2012-10-06 | tcg: Add TCG_COND_NEVER, TCG_COND_ALWAYS | Richard Henderson |
2012-10-06 | tcg: remove obsolete jmp op | Aurelien Jarno |
2012-09-22 | tcg: Remove tcg_target_get_call_iarg_regs_count | Stefan Weil |
2012-09-15 | Remove unused CONFIG_TCG_PASS_AREG0 and dead code | Blue Swirl |
2012-06-24 | TCG: Fix compile breakage in tcg_dump_ops | Alexander Graf |
2012-05-15 | tcg/ppc64: Fix CONFIG_TCG_PASS_AREG0 | Andreas Färber |
2012-05-15 | tcg/ppc64: Don't hardcode register numbers for qemu_ld/st | Andreas Färber |
2012-05-03 | Restore consistent formatting | malc |
2012-03-29 | qemu tcg: Remove one entry of INDEX_op_ld_i64 from ppc_op_defs | Li Zhang |
2012-03-18 | softmmu templates: optionally pass CPUState to memory access functions | Blue Swirl |
2012-03-14 | Rename CPUState -> CPUArchState | Andreas Färber |
2011-11-19 | Merge branch 's390-1.0' of git://repo.or.cz/qemu/agraf | Blue Swirl |
2011-11-14 | tcg: Use TCGReg for standard tcg-target entry points. | Richard Henderson |
2011-11-11 | tcg-ppc64: Fix compile errors for userspace only builds with gcc 4.6 | David Gibson |
2011-09-17 | tcg/ppc64: Only one call output register needed for 64 bit hosts | Stefan Weil |
2011-09-09 | tcg/ppc64: Fix zero extension code generation bug for ppc64 host | Thomas Huth |
2011-08-22 | tcg/ppc64: implement not_i32/64 and ext32u_i64 | malc |
2011-06-28 | TCG/PPC: use stack for TCG temps | Blue Swirl |
2011-06-28 | tcg/ppc64: Remove tcg_out_addi | malc |
2011-06-26 | Delegate setup of TCG temporaries to targets | Blue Swirl |
2011-06-26 | cpu-exec.c: avoid AREG0 use | Blue Swirl |
2010-08-15 | TCG: Revert ppc64 tcg_out_movi32 change | Andreas Färber |
2010-06-29 | tcg-ppc: Conditionally reserve TCG_GUEST_BASE_REG. | Richard Henderson |
2010-06-09 | tcg: Make some tcg-target.c routines static. | Richard Henderson |
2010-06-09 | tcg: Add TYPE parameter to tcg_out_mov. | Richard Henderson |
2010-04-07 | tcg/ppc64: Fix typo | malc |
2010-04-05 | Split TLB addend and target_phys_addr_t | Paul Brook |
2010-03-26 | tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs. | Richard Henderson |
2010-03-26 | tcg: Use TCGCond where appropriate. | Richard Henderson |
2010-03-26 | tcg: Name the opcode enumeration. | Richard Henderson |
2010-03-13 | tcg/ppc[64]: Only define addend load helpers in softmmu case | malc |
2010-02-07 | tcg/ppc64: implement setcond | malc |
2009-12-15 | tcg/ppc64: Fix loading of 32bit constants | malc |
2009-12-06 | TCG: Mac OS X support for ppc64 target | Andreas Faerber |
2009-11-24 | tcg/ppc64,x86_64: fix constraints of op_qemu_st64 | Aurelien Jarno |
2009-07-18 | PPC 32/64 GUEST_BASE support | malc |
2009-07-18 | Fix LHZX opcode value | malc |
2009-04-11 | Remove reserved registers from tcg_target_reg_alloc_order | malc |
2009-04-11 | Whack [LS]MW | malc |
2009-02-11 | Add missing r24..r26 to callee save registers | malc |
2008-12-22 | Use the ARRAY_SIZE() macro where appropriate. | malc |
2008-11-12 | Avoid compiler warning | malc |
2008-11-11 | Fix alignment problem with some 64bit load/store instructions | malc |
2008-10-05 | Add some missing static and const qualifiers, reg_names only used if NDEBUG set | blueswir1 |
2008-10-02 | Optimize 64 bit bswap | malc |
2008-08-30 | Fix some warnings that would be generated by gcc -Wredundant-decls | blueswir1 |
2008-08-20 | Relax qemu_ld/st constraints for !SOFTMMU case | malc |
2008-08-20 | Avoid clobbering input/aliased registers in !SOFTMMU+64bit+bswap case | malc |
2008-08-20 | Clear the upper 32 bits of addr_reg in TARGET_LONG_BITS == 32 case | malc |
2008-08-20 | Move tcg_out_tlb_read into #ifdef CONFIG_SOFTMMU block to avoid compiler warning | malc |