Age | Commit message (Expand) | Author |
2015-08-24 | tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32 | Richard Henderson |
2015-08-24 | tcg: rename trunc_shr_i32 into trunc_shr_i64_i32 | Aurelien Jarno |
2015-06-03 | tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITS | Paolo Bonzini |
2014-06-23 | tcg-ppc: Merge cache-utils into the backend | Richard Henderson |
2014-06-23 | tcg-ppc: Rename the tcg/ppc64 backend | Richard Henderson |
2014-06-23 | tcg-ppc: Remove the backend | Richard Henderson |
2014-06-04 | tcg: Remove TCG_TARGET_HAS_new_ldst | Richard Henderson |
2014-05-12 | tcg-ppc: Define TCG_TARGET_INSN_UNIT_SIZE | Richard Henderson |
2014-04-18 | tcg: Use HOST_WORDS_BIGENDIAN | Richard Henderson |
2014-04-18 | tcg: Relax requirement for mulu2_i32 on 32-bit hosts | Richard Henderson |
2013-10-12 | tcg-ppc: Support new ldst opcodes | Richard Henderson |
2013-10-10 | tcg: Add qemu_ld_st_i32/64 | Richard Henderson |
2013-09-02 | tcg: Change tcg_qemu_tb_exec return to uintptr_t | Richard Henderson |
2013-09-02 | tcg: Add muluh and mulsh opcodes | Richard Henderson |
2013-07-09 | tcg-ppc: Don't implement rem | Richard Henderson |
2013-07-09 | tcg: Split rem requirement from div requirement | Richard Henderson |
2013-02-23 | tcg: Add signed multiword multiplication operations | Richard Henderson |
2013-02-17 | tcg/ppc: Fix build of tcg_qemu_tb_exec() | Andreas Färber |
2012-12-19 | janitor: add guards to headers | Paolo Bonzini |
2012-10-12 | tcg: Remove TCG_TARGET_HAS_GUEST_BASE define | Peter Maydell |
2012-09-22 | tcg/ppc32: Implement movcond32 | malc |
2012-09-21 | tcg: Introduce movcond | Richard Henderson |
2012-03-18 | i386: Remove REGPARM | Blue Swirl |
2011-11-14 | tcg: Standardize on TCGReg as the enum for hard registers | Richard Henderson |
2011-10-31 | tcg: TCG targets may define tcg_qemu_tb_exec | Stefan Weil |
2011-10-01 | tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.h | Stefan Weil |
2011-08-22 | tcg/ppc32: implement deposit_i32 | malc |
2011-08-21 | tcg: Always define all of the TCGOpcode enum members. | Richard Henderson |
2010-08-15 | TCG: Fix Darwin/ppc calling convention recognition | Andreas Färber |
2010-04-06 | tcg/ppc: Implment bswap16/32 | malc |
2010-04-05 | tcg/ppc: Implement eqv, nand and nor | malc |
2010-03-26 | tcg: Allow target-specific implementation of NOR. | Richard Henderson |
2010-03-26 | tcg: Allow target-specific implementation of NAND. | Richard Henderson |
2010-03-26 | tcg: Allow target-specific implementation of EQV. | Richard Henderson |
2010-03-26 | remove remaining occurrences AREG[1-9] and TCG_AREG[1-9] | Paolo Bonzini |
2010-02-22 | tcg/ppc: Implement some of the optional ops | malc |
2010-02-20 | tcg: Add comments for all optional instructions not implemented. | Richard Henderson |
2010-02-20 | Use ppc host calling convention definitions to set TCG_TARGET_CALL_{ALIGN_ARG... | Juergen Lock |
2009-07-18 | PPC 32/64 GUEST_BASE support | malc |
2009-03-08 | Prune unused TCG_AREGs | blueswir1 |
2008-12-10 | Introduce and use cache-utils.[ch] | malc |
2008-11-18 | Preliminary AIX support | malc |
2008-08-03 | Account for MacOS X ABI reserved space in linkage area (Andreas Faerber) | malc |
2008-08-03 | Preliminary MacOS X on PPC32 support | malc |
2008-07-23 | Provide extNs_M instructions | malc |
2008-06-09 | Use rem/div[u]_i32 drop div[u]2_i32 | malc |
2008-05-25 | ppc TCG target (malc) | bellard |