Age | Commit message (Expand) | Author |
2012-09-22 | tcg: Remove tcg_target_get_call_iarg_regs_count | Stefan Weil |
2012-09-15 | Remove unused CONFIG_TCG_PASS_AREG0 and dead code | Blue Swirl |
2012-06-24 | TCG: Fix compile breakage in tcg_dump_ops | Alexander Graf |
2012-05-27 | tcg/ppc: Handle _CALL_DARWIN being undefined on Darwin | Andreas Färber |
2012-05-09 | tcg/ppc: Fix CONFIG_TCG_PASS_AREG0 mode | Andreas Färber |
2012-05-09 | tcg/ppc: Clobber r5 for 64-bit qemu_ld | Andreas Färber |
2012-05-09 | tcg/ppc: Don't hardcode register numbers | Andreas Färber |
2012-05-09 | tcg/ppc: Do not overwrite lower address word on Darwin and AIX | Andreas Färber |
2012-05-03 | Bail out if CONFIG_TCG_PASS_AREG0 is defined | malc |
2012-03-18 | softmmu templates: optionally pass CPUState to memory access functions | Blue Swirl |
2012-03-14 | Rename CPUState -> CPUArchState | Andreas Färber |
2011-11-14 | tcg: Use TCGReg for standard tcg-target entry points. | Richard Henderson |
2011-09-01 | tcg/ppc/tcg-target.c: Avoid 'set but not used' gcc warnings | Peter Maydell |
2011-08-22 | tcg/ppc32: implement deposit_i32 | malc |
2011-06-28 | TCG/PPC: use stack for TCG temps | Blue Swirl |
2011-06-28 | tcg/ppc: Remove tcg_out_addi | malc |
2011-06-26 | Delegate setup of TCG temporaries to targets | Blue Swirl |
2011-06-26 | cpu-exec.c: avoid AREG0 use | Blue Swirl |
2010-06-29 | tcg-ppc: Conditionally reserve TCG_GUEST_BASE_REG. | Richard Henderson |
2010-06-09 | tcg: Make some tcg-target.c routines static. | Richard Henderson |
2010-06-09 | tcg: Add TYPE parameter to tcg_out_mov. | Richard Henderson |
2010-04-18 | tcg/ppc: Remove redundant comparison from brcond2 | malc |
2010-04-17 | tcg/ppc: Fix signed versions of brcond2 | malc |
2010-04-06 | tcg/ppc: Fix typo | malc |
2010-04-06 | tcg/ppc: Implment bswap16/32 | malc |
2010-04-05 | tcg/ppc: Implement eqv, nand and nor | malc |
2010-04-05 | Split TLB addend and target_phys_addr_t | Paul Brook |
2010-04-04 | tcg/ppc: Fix not_i32 | malc |
2010-03-26 | tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs. | Richard Henderson |
2010-03-26 | tcg: Use TCGCond where appropriate. | Richard Henderson |
2010-03-26 | tcg: Name the opcode enumeration. | Richard Henderson |
2010-03-13 | tcg/ppc[64]: Only define addend load helpers in softmmu case | malc |
2010-02-27 | tcg/ppc: Fix right rotation | malc |
2010-02-23 | tcg/ppc: Fix typo | malc |
2010-02-22 | tcg/ppc: Implement some of the optional ops | malc |
2010-02-22 | tcg: fix build on 32-bit hppa, ppc and sparc hosts | Jay Foad |
2010-02-20 | tcg/ppc: Consistently use calling convention selection macros | malc |
2010-02-07 | tcg/ppc32: proper setcond implementation | malc |
2010-02-07 | tcg/ppc32: implement setcond[2] | malc |
2009-09-27 | tcg/ppc: always use tcg_out_call | malc |
2009-09-06 | When targeting PPU use rlwinm instead of andi. if possible | malc |
2009-07-20 | Fix rbase initialization | malc |
2009-07-18 | PPC 32/64 GUEST_BASE support | malc |
2009-07-18 | Fix LHZX opcode value | malc |
2009-04-11 | Whack [LS]MW | malc |
2009-04-11 | Remove reserved registers from tcg_target_reg_alloc_order | malc |
2009-02-11 | Add missing r24..r26 to calle save registers | malc |
2009-01-26 | R13 is reserved for small data area pointer by SVR4 PPC ABI | malc |
2008-12-22 | Use the ARRAY_SIZE() macro where appropriate. | malc |
2008-11-18 | Preliminary AIX support | malc |