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AgeCommit message (Expand)Author
2011-06-03Use the correct header in the TCG MIPS code to find cacheflush() on OpenBSD.Brad
2011-01-12tcg arm/mips/ia64: add a comment about retranslation and cachesAurelien Jarno
2011-01-08tcg/mips: fix branch target change during code retranslationAurelien Jarno
2010-06-09tcg: Make some tcg-target.c routines static.Richard Henderson
2010-06-09tcg: Add TYPE parameter to tcg_out_mov.Richard Henderson
2010-04-14tcp/mips: Change TCG_AREG0 (fp -> s0)Stefan Weil
2010-04-05tcg/mips: use seb/seh instructions on MIPS32R2Aurelien Jarno
2010-04-05tcg/mips: fix 64-bit linux-user on big endian MIPSAurelien Jarno
2010-04-05Split TLB addend and target_phys_addr_tPaul Brook
2010-03-29tcg/mips: fix branch offset during retranslationAurelien Jarno
2010-03-27tcg-mips: add guest base supportAurelien Jarno
2010-03-27tcg/mips: implement the not_i32 op the same way as gccAurelien Jarno
2010-03-27tcg-mips: implement norAurelien Jarno
2010-03-26tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.Richard Henderson
2010-03-26tcg: Allow target-specific implementation of NOR.Richard Henderson
2010-03-26tcg: Allow target-specific implementation of NAND.Richard Henderson
2010-03-26tcg: Allow target-specific implementation of EQV.Richard Henderson
2010-03-26tcg: Use TCGCond where appropriate.Richard Henderson
2010-03-26tcg: Name the opcode enumeration.Richard Henderson
2010-03-26remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]Paolo Bonzini
2010-02-20tcg: Add comments for all optional instructions not implemented.Richard Henderson
2010-02-09tcg/mips: fix crash in tcg_out_qemu_ld()Aurelien Jarno
2010-02-09tcg/mips: implement setcond2Aurelien Jarno
2010-02-08tcg/mips: implement setcondAurelien Jarno
2009-12-01tcg: initial mips supportAurelien Jarno