| Age | Commit message (Expand) | Author |
|---|
| 2014-04-18 | tcg: Use HOST_WORDS_BIGENDIAN | Richard Henderson |
| 2014-04-18 | tcg: Relax requirement for mulu2_i32 on 32-bit hosts | Richard Henderson |
| 2013-10-10 | tcg: Add qemu_ld_st_i32/64 | Richard Henderson |
| 2013-09-03 | Merge branch 'tcg-next' of git://github.com/rth7680/qemu | Aurelien Jarno |
| 2013-09-03 | tcg/mips: only enable ext8s/ext16s ops on MIPS32R2 | Aurelien Jarno |
| 2013-09-03 | tcg/mips: detect available host instructions at runtime | Aurelien Jarno |
| 2013-09-02 | tcg: Change flush_icache_range arguments to uintptr_t | Richard Henderson |
| 2013-09-02 | tcg-mips: Implement mulsh, muluh | Richard Henderson |
| 2013-09-02 | tcg: Add muluh and mulsh opcodes | Richard Henderson |
| 2013-07-09 | tcg: Split rem requirement from div requirement | Richard Henderson |
| 2013-04-01 | tcg/mips: Implement muls2_i32 | Aurelien Jarno |
| 2013-02-23 | tcg: Add signed multiword multiplication operations | Richard Henderson |
| 2012-12-19 | janitor: add guards to headers | Paolo Bonzini |
| 2012-10-12 | tcg: Remove TCG_TARGET_HAS_GUEST_BASE define | Peter Maydell |
| 2012-09-26 | tcg/mips: fix MIPS32(R2) detection | Aurelien Jarno |
| 2012-09-22 | tcg/mips: implement movcond op on MIPS32R2 | Aurelien Jarno |
| 2012-09-22 | tcg/mips: implement deposit op on MIPS32R2 | Aurelien Jarno |
| 2012-09-22 | tcg/mips: implement rotl/rotr ops on MIPS32R2 | Aurelien Jarno |
| 2012-09-22 | tcg/mips: optimize bswap{16,16s,32} on MIPS32R2 | Aurelien Jarno |
| 2012-09-21 | tcg: Introduce movcond | Richard Henderson |
| 2012-09-15 | Remove unused CONFIG_TCG_PASS_AREG0 and dead code | Blue Swirl |
| 2012-03-03 | w64: Change data type of parameters for flush_icache_range | Stefan Weil |
| 2011-11-14 | tcg: Standardize on TCGReg as the enum for hard registers | Richard Henderson |
| 2011-10-01 | tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.h | Stefan Weil |
| 2011-08-21 | tcg: Always define all of the TCGOpcode enum members. | Richard Henderson |
| 2011-06-03 | Use the correct header in the TCG MIPS code to find cacheflush() on OpenBSD. | Brad |
| 2010-04-14 | tcp/mips: Change TCG_AREG0 (fp -> s0) | Stefan Weil |
| 2010-04-05 | tcg/mips: use seb/seh instructions on MIPS32R2 | Aurelien Jarno |
| 2010-03-27 | tcg-mips: add guest base support | Aurelien Jarno |
| 2010-03-27 | tcg-mips: implement nor | Aurelien Jarno |
| 2010-03-26 | tcg: Allow target-specific implementation of NOR. | Richard Henderson |
| 2010-03-26 | tcg: Allow target-specific implementation of NAND. | Richard Henderson |
| 2010-03-26 | tcg: Allow target-specific implementation of EQV. | Richard Henderson |
| 2010-03-26 | remove remaining occurrences AREG[1-9] and TCG_AREG[1-9] | Paolo Bonzini |
| 2010-02-20 | tcg: Add comments for all optional instructions not implemented. | Richard Henderson |
| 2009-12-01 | tcg: initial mips support | Aurelien Jarno |
