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2010-05-21tcg-i386: Tidy lea.Richard Henderson
Implement full modrm+sib addressing mode processing. Use that in qemu_ld/st to output the LEA. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy xchg.Richard Henderson
Define and use OPC_XCHG_ax_r32. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy multiply.Richard Henderson
Define and use OPC_IMUL_GvEv{,Ib,Iz}. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy unary arithmetic.Richard Henderson
Define OPC_GRP3 and EXT3_FOO to match. Use them instead of bare constants. Define OPC_GRP5 and rename the existing EXT_BAR to EXT5_BAR to make it clear which extension should be used with which opcode. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy setcc.Richard Henderson
Define and use OPC_SETCC. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy ret.Richard Henderson
Define and use OPC_RET. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy calls.Richard Henderson
Define OPC_CALL_Jz, generated by tcg_out_calli; use the later throughout. Unify the calls within qemu_st; adjust the stack with a single pop if applicable. Define and use EXT_CALLN_Ev for indirect calls. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy push/pop.Richard Henderson
Move tcg_out_push/pop up in the file so that they can be used by qemu_ld/st. Define a tcg_out_pushi to be used as well. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy movi.Richard Henderson
Define and use OPC_MOVL_Iv. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy non-immediate arithmetic operations.Richard Henderson
Add more OPC values, and tgen_arithr. Use the later throughout. Note that normal reg/reg arithmetic now uses the Gv,Ev opcode form instead of the Ev,Gv opcode form used previously. Both forms disassemble properly, and so there's no visible change when diffing log files before and after the change. This change makes the operand ordering within the output routines more natural, and avoids the need to define an OPC_ARITH_EvGv since a read-modify-write with memory is not needed within TCG. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy immediate arithmetic operations.Richard Henderson
Define OPC_ARITH_EvI[bz]; use throughout. Use tcg_out_ext8u directly in setcond. Use tgen_arithi in qemu_ld/st. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy ext8s and ext16s operations.Richard Henderson
Define OPC_MOVSBL and OPC_MOVSWL. Factor opcode emission to separate functions. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy ext8u and ext16u operations.Richard Henderson
Define OPC_MOVZBL and OPC_MOVZWL. Factor opcode emission to separate functions. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-20tcg-i386: Tidy jumps.Richard Henderson
Define OPC_JCC*, OC_JMP*, and EXT_JMPN_Ev. Use them throughout. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-20tcg-i386: Eliminate extra move from qemu_ld64.Richard Henderson
If the address register overlaps one of the output registers simply issue the clobbering load last, rather than emitting an extra move of the address register. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-20tcg-i386: Tidy move operations.Richard Henderson
Define OPC_MOVB* and OPC_MOVL*; use them throughout. Use tcg_out_ld/st instead of bare tcg_out_modrm_offset when it makes sense. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-20tcg-i386: Tidy shift operations.Richard Henderson
Define OPC_SHIFT_{1,Ib,cl}. Factor opcode emission to a function. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-20tcg-i386: Tidy bswap operations.Richard Henderson
Define OPC_BSWAP. Factor opcode emission to separate functions. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-19tcg-i386: Tidy initialization of tcg_target_call_clobber_regs.Richard Henderson
Setting the registers one by one is easier to read, and gets optimized by the compiler just the same. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-19tcg-i386: Allocate call-saved registers first.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.Richard Henderson
Some targets (e.g. Alpha and MIPS64) need to keep 32-bit operands sign-extended in 64-bit registers (regardless of the "real" sign of the operand). For that, we need to be able to distinguish between a 32-bit load with a 32-bit result and a 32-bit load with a given extension to a 64-bit result. This distinction already exists for the ld* loads, but not the qemu_ld* loads. Reserve qemu_ld32u for 64-bit outputs and introduce qemu_ld32 for 32-bit outputs. Adjust all code generators to match. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26tcg: Use TCGCond where appropriate.Richard Henderson
Use the TCGCond enumeration type in the brcond and setcond related prototypes in tcg-op.h and each code generator. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26tcg: Name the opcode enumeration.Richard Henderson
Give the enumeration formed from tcg-opc.h a name: TCGOpcode. Use that enumeration type instead of "int" whereever appropriate. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-12Remove TLB from userspacePaul Brook
Remove TLB from userspace CPU structure. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-02-06tcg-i386: Implement setcond.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-06tcg-i386: Implement small forward branches.Richard Henderson
There are places, like brcond2, where we know that the destination of a forward branch will be within 127 bytes. Add the R_386_PC8 relocation type to support this. Add a flag to tcg_out_jxx and tcg_out_brcond* to enable it. Set the flag in the brcond2 label_next branches; pass along the input flag otherwise. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-11-14tcg/i386: remove duplicate sar opcodeMagnus Damm
Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-04tcg/i386: add support for ext{8,16}u_i32 TCG opsAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-27tcg/i386: generates dec/inc instead of sub/add when possibleAurelien Jarno
We must take care that dec/inc do not compute CF, which is needed by add2/sub2. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-27tcg/i386: optimize and $0xff(ff), regAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-07-17Userspace guest address offsettingJuan Quintela
Fix type in i386 tcg. Signed-off-by: Juan Quintela <quintela@redhat.com>
2009-07-17Userspace guest address offsettingPaul Brook
Re-implement GUEST_BASE support. Offset guest ddress space by default if the guest binary contains regions below the host mmap_min_addr. Implement support for i386, x86-64 and arm hosts. Signed-off-by: Riku Voipio <riku.voipio@iki.fi> Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-03-13tcg/x86: add bswap16_i32 opsaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6837 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13tcg: rename bswap_i32/i64 functionsaurel32
Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64 Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-10tcg/x86: add not/neg/extu/bswap/rot i32 opsaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6806 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-14tcg: kill two warningsaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6029 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13TCG x86/x86-64: use move with zero-extend for loads/storesaurel32
Starting with version 4.3, gcc returns the result of a function in rax/eax/ax/al instead of rax/eax, depending of the return type. As a consequence we should use a zero extend moe in TCG loads/stores. See http://gcc.gnu.org/ml/gcc/2008-01/msg00052.html for more details. A big thanks to malc who founds the problem and wrote the x86 patch. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6011 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-05Add some missing static and const qualifiers, reg_names only used if NDEBUG setblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5421 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30Fix some warnings that would be generated by gcc -Wredundant-declsblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-0764 bit signed comparison fix (Juergen Lock)bellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4855 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25jump optimizationsbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4582 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10fixed global variable handling with qemu load/stores - initial global ↵bellard
prologue/epilogue implementation git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4406 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-12HPPA (PA-RISC) host supportaurel32
(Stuart Brady) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4199 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-13 Fix i32 memory backed variables on 64-bit hostblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4044 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-11 Remove blank elements in tcg_target_reg_alloc_order[] (Stuart Brady)blueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4039 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-10Simplify TCG relocation bugfix.pbrook
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3974 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-03compare fixbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3962 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01TCG code generatorbellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3943 c046a42c-6fe2-441c-8c8c-71466251a162
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