Age | Commit message (Expand) | Author |
2010-03-26 | tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs. | Richard Henderson |
2010-03-26 | tcg: Allow target-specific implementation of NOR. | Richard Henderson |
2010-03-26 | tcg: Allow target-specific implementation of NAND. | Richard Henderson |
2010-03-26 | tcg: Allow target-specific implementation of EQV. | Richard Henderson |
2010-03-26 | tcg: Name the opcode enumeration. | Richard Henderson |
2010-03-26 | remove remaining occurrences AREG[1-9] and TCG_AREG[1-9] | Paolo Bonzini |
2010-03-20 | tcg/arm: don't save/restore r7 in prologue/epilogue | Aurelien Jarno |
2010-03-20 | tcg/arm: fix load/store definitions for 32-bit targets | Aurelien Jarno |
2010-03-14 | tcg/arm: use helpers for divu/remu | Aurelien Jarno |
2010-03-14 | tcg: add div/rem 32-bit helpers | Aurelien Jarno |
2010-03-13 | tcg/arm: implement andc op | Aurelien Jarno |
2010-03-13 | tcg/arm: correctly save/restore registers in prologue/epilogue | Aurelien Jarno |
2010-03-12 | Remove TLB from userspace | Paul Brook |
2010-03-02 | tcg/arm: merge the two sets of #define for optional ops | Aurelien Jarno |
2010-03-02 | tcg/arm: accept immediate arguments for brcond/setcond | Aurelien Jarno |
2010-03-02 | Add a missing break | Andrzej Zaborowski |
2010-03-02 | tcg/arm: implement setcond2 | Aurelien Jarno |
2010-03-02 | tcg/arm: implement setcond | Aurelien Jarno |
2010-03-02 | tcg/arm: fix div2/divu2 | Aurelien Jarno |
2010-02-20 | tcg: Add comments for all optional instructions not implemented. | Richard Henderson |
2009-09-26 | ARM back-end: Use sxt[bh] instructions for ext{8, 6}s | Laurent Desnogues |
2009-09-25 | Suppress some variants of English in comments | Stefan Weil |
2009-08-25 | ARM back-end: Fix encode_imm | Laurent Desnogues |
2009-08-22 | ARM back-end: Handle all possible immediates for ALU ops | Laurent Desnogues |
2009-08-22 | ARM back-end: Add TCG not | Laurent Desnogues |
2009-07-27 | rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN | Juan Quintela |
2009-07-18 | this patch improves the ARM back-end in the following way: | Laurent Desnogues |
2009-07-17 | Userspace guest address offsetting | Paul Brook |
2009-07-17 | ARM host fixes | Paul Brook |
2009-03-13 | tcg: rename bswap_i32/i64 functions | aurel32 |
2009-03-10 | tcg-arm: fix qemu_ld64 | aurel32 |
2009-03-08 | Prune unused TCG_AREGs | blueswir1 |
2008-12-07 | Fix 64-bit targets compilation on ARM host. | balrog |
2008-12-01 | arm: Don't potentially overwrite input registers in add2, sub2. | balrog |
2008-12-01 | Don't rely on ARM tcg_out_goto() generating just a single insn. | balrog |
2008-12-01 | Use libgcc __clear_cache to clean icache, when available. | balrog |
2008-10-05 | Add some missing static and const qualifiers, reg_names only used if NDEBUG set | blueswir1 |
2008-08-30 | Fix some warnings that would be generated by gcc -Wredundant-decls | blueswir1 |
2008-05-25 | Fix off-by-one unwinding error. | pbrook |
2008-05-24 | Relax a constraint for qemu_ld64 on ARM host. | balrog |
2008-05-24 | Fix a deadly typo, correct comments. | balrog |
2008-05-24 | Fix ARM host TLB. | pbrook |
2008-05-23 | Comment non-obvious calculation. Don't clobber r3 in qemu_st64. | balrog |
2008-05-23 | A branch insn must not overwrite the branch target before relocation. | balrog |
2008-05-23 | Fix qemu_ld/st for mem_index > 0 on arm host. | balrog |
2008-05-23 | Define TCG_TARGET_CALL_STACK_OFFSET on arm. | balrog |
2008-05-20 | Fix 8-bit signed load/store and a typo. | balrog |
2008-05-20 | Implement neg_i32, clean-up. | balrog |
2008-05-19 | ARM host support for TCG targets. | balrog |